73f7cc5855
tlsr82: first commit of telink tlsr82xx chip port. - tc32 archtecture context switch; - tc32 backtrace; - timer, uart, pwm, gpio, adc driver; - flash, watchdog driver; - uart txdma/rxdma; - spi console driver; - add board bringup and reset; Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
551 lines
17 KiB
C
551 lines
17 KiB
C
/****************************************************************************
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* arch/arm/src/tlsr82/tlsr82_watchdog.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <stdint.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/timers/watchdog.h>
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#include <arch/board/board.h>
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#include "hardware/tlsr82_clock.h"
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#include "hardware/tlsr82_timer.h"
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#if defined(CONFIG_WATCHDOG) && defined(CONFIG_TLSR82_WATCHDOG)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* The timer2 clock in watchdog mode is always system clock, and the watchdog
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* capture bits number is only 14 (high 14 bit valid, mask = 0xfffc0000)
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* so the max timeout value = 0xfffc0000 / WDOG_CLK_MHZ / 1000 (ms)
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* the resolution value = 0x0003ffff / WDOG_CLK_MHZ / 1000 (ms)
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*/
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#define WDOG_CLK_MHZ CONFIG_TLSR82_CPU_CLK_MHZ
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#define WDOG_VALID_SHIFT 18
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#define WDOG_VALID_MASK (0x00003fff << WDOG_VALID_SHIFT)
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#define WDOG_RES_MASK (~WDOG_VALID_MASK)
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#define WDOG_MINTIMEOUT 1
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#define WDOG_MAXTIMEOUT (WDOG_VALID_MASK / WDOG_CLK_MHZ / 1000)
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#define WDOG_RESOLUTION (WDOG_RES_MASK / WDOG_CLK_MHZ / 1000)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This structure provides the private representation of the "lower-half"
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* driver state structure. This structure must be cast-compatible with the
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* well-known watchdog_lowerhalf_s structure.
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*/
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struct tlsr82_lowerhalf_s
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{
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const struct watchdog_ops_s *ops; /* Lower half operations */
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xcpt_t handler; /* Current EWI interrupt handler */
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uint32_t timeout; /* The actual timeout value */
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uint32_t capture; /* Watchdog capture register value */
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bool started; /* The timer has been started */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Register operations ******************************************************/
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#ifdef CONFIG_DEBUG_WATCHDOG_INFO
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static void tlsr82_dumpregs(const char *msg);
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#else
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# define tlsr82_dumpregs(msg)
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#endif
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/* "Lower half" driver methods **********************************************/
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static int tlsr82_start(struct watchdog_lowerhalf_s *lower);
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static int tlsr82_stop(struct watchdog_lowerhalf_s *lower);
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static int tlsr82_keepalive(struct watchdog_lowerhalf_s *lower);
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static int tlsr82_getstatus(struct watchdog_lowerhalf_s *lower,
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struct watchdog_status_s *status);
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static int tlsr82_settimeout(struct watchdog_lowerhalf_s *lower,
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uint32_t timeout);
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static xcpt_t tlsr82_capture(struct watchdog_lowerhalf_s *lower,
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xcpt_t handler);
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static int tlsr82_ioctl(struct watchdog_lowerhalf_s *lower, int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* "Lower half" driver methods */
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static const struct watchdog_ops_s g_wdgops =
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{
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.start = tlsr82_start,
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.stop = tlsr82_stop,
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.keepalive = tlsr82_keepalive,
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.getstatus = tlsr82_getstatus,
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.settimeout = tlsr82_settimeout,
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.capture = tlsr82_capture,
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.ioctl = tlsr82_ioctl,
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};
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/* "Lower half" driver state */
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static struct tlsr82_lowerhalf_s g_wdgdev;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tlsr82_dumpregs
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*
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* Description:
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* Start the watchdog timer, resetting the time to the current timeout,
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*
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* Input Parameters:
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* msg - the message that caller want to print
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_WATCHDOG_INFO
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static void tlsr82_dumpregs(const char *msg)
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{
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uint8_t status = WDOG_STATUS_REG;
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uint32_t ctrl = WDOG_CTRL_REG;
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uint32_t tick2 = TIMER_TICK2_REG;
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wdinfo("%s\n", msg);
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/* Watchdog status register */
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wdinfo(" WDOG_STATUS_REG : 0x%02x\n", status);
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/* Watchdog control register, extract the key information */
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wdinfo(" WDOG_CTRL_REG, CAPTURE : 0x%08lx\n",
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(ctrl & WDOG_CTRL_CAPT_MASK) >> WDOG_CTRL_CAPT_SHIFT);
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wdinfo(" WDOG_CTRL_REG, WDOG EN : 0x%08lx\n",
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(ctrl & WDOG_CTRL_ENABLE_MASK) >> WDOG_CTRL_ENABLE_SHIFT);
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wdinfo(" WDOG_CTRL_REG, TIM2 EN : 0x%08lx\n",
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(ctrl & TIMER_CTRL_T2_ENABLE) >> TIMER_CTRL_T2_ENABLE_SHIFT);
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/* Timer2 tick register */
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wdinfo(" TIMER_TICK2_REG : 0x%08lx\n", tick2);
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}
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#endif
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/****************************************************************************
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* Name: tlsr82_start
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*
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* Description:
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* Start the watchdog timer, resetting the time to the current timeout,
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the "lower-
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* half" driver state structure.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int tlsr82_start(struct watchdog_lowerhalf_s *lower)
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{
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struct tlsr82_lowerhalf_s *priv = (struct tlsr82_lowerhalf_s *)lower;
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wdinfo("Entry\n");
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DEBUGASSERT(priv);
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/* Write 1 to TIMER_STATUS_REG to clear the watch dog */
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BM_SET(TIMER_STATUS_REG, TIMER_STATUS_WDOG_CLR);
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/* Enable watchdog capture and timer2 */
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BM_SET(WDOG_CTRL_REG, WDOG_CTRL_ENABLE_MASK);
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BM_SET(TIMER_CTRL_REG, TIMER_CTRL_T2_ENABLE);
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tlsr82_dumpregs("Watchdog start");
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priv->started = true;
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return OK;
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}
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/****************************************************************************
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* Name: tlsr82_stop
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*
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* Description:
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* Stop the watchdog timer
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the "lower-
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* half" driver state structure.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int tlsr82_stop(struct watchdog_lowerhalf_s *lower)
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{
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struct tlsr82_lowerhalf_s *priv = (struct tlsr82_lowerhalf_s *)lower;
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wdinfo("Entry\n");
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/* Disable watchdog capture and timer2 */
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BM_CLR(WDOG_CTRL_REG, WDOG_CTRL_ENABLE_MASK);
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BM_CLR(TIMER_CTRL_REG, TIMER_CTRL_T2_ENABLE);
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/* Write 1 to TIMER_STATUS_REG to clear the watch dog */
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BM_SET(TIMER_STATUS_REG, TIMER_STATUS_WDOG_CLR);
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tlsr82_dumpregs("Watchdog stop");
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priv->started = false;
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return OK;
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}
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/****************************************************************************
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* Name: tlsr82_keepalive
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*
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* Description:
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* Reset the watchdog timer to the current timeout value, prevent any
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* imminent watchdog timeouts. This is sometimes referred as "pinging"
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* the watchdog timer or "petting the dog".
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*
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* The application program must write in the WWDG_CR register at regular
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* intervals during normal operation to prevent an MCU reset. This
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* operation must occur only when the counter value is lower than the
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* window register value. The value to be stored in the WWDG_CR register
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* must be between 0xff and 0xC0:
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the "lower-
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* half" driver state structure.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int tlsr82_keepalive(struct watchdog_lowerhalf_s *lower)
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{
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struct tlsr82_lowerhalf_s *priv = (struct tlsr82_lowerhalf_s *)lower;
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wdinfo("Entry\n");
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DEBUGASSERT(priv);
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/* Write 1 to TIMER_STATUS_REG to clear the watch dog */
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BM_SET(TIMER_STATUS_REG, TIMER_STATUS_WDOG_CLR);
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tlsr82_dumpregs("Watchdog keepalive");
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return OK;
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}
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/****************************************************************************
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* Name: tlsr82_getstatus
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*
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* Description:
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* Get the current watchdog timer status
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the "lower-
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* half" driver state structure.
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* status - The location to return the watchdog status information.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int tlsr82_getstatus(struct watchdog_lowerhalf_s *lower,
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struct watchdog_status_s *status)
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{
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struct tlsr82_lowerhalf_s *priv = (struct tlsr82_lowerhalf_s *)lower;
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uint32_t lefttick;
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wdinfo("Entry\n");
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DEBUGASSERT(priv);
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/* Return the status bit */
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status->flags = WDFLAGS_RESET;
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if (priv->started)
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{
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status->flags |= WDFLAGS_ACTIVE;
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}
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/* Return the actual timeout is milliseconds */
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status->timeout = priv->timeout;
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/* Get the time remaining until the watchdog expires (in milliseconds) */
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lefttick = priv->capture - TIMER_TICK2_REG;
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status->timeleft = lefttick / (WDOG_CLK_MHZ * 1000);
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tlsr82_dumpregs("Watchdog getstatus");
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wdinfo("Status :\n");
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wdinfo(" flags : %08lx\n", status->flags);
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wdinfo(" timeout : %lu\n", status->timeout);
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wdinfo(" timeleft : %lu\n", status->timeleft);
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return OK;
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}
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/****************************************************************************
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* Name: tlsr82_settimeout
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*
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* Description:
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* Set a new timeout value (and reset the watchdog timer)
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the
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* "lower-half" driver state structure.
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* timeout - The new timeout value in milliseconds.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int tlsr82_settimeout(struct watchdog_lowerhalf_s *lower,
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uint32_t timeout)
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{
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struct tlsr82_lowerhalf_s *priv = (struct tlsr82_lowerhalf_s *)lower;
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uint32_t capture;
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uint32_t tick;
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DEBUGASSERT(priv);
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wdinfo("Entry: timeout=%lu\n", timeout);
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/* Can this timeout be represented? */
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if (timeout < WDOG_MINTIMEOUT || timeout > WDOG_MAXTIMEOUT)
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{
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wderr("ERROR: Cannot represent timeout=%u > %u\n",
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(unsigned)timeout, WDOG_MAXTIMEOUT);
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return -ERANGE;
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}
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/* Calculate the watchdog capture value */
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/* Get the ideal tick value */
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tick = timeout * 1000 * WDOG_CLK_MHZ;
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/* Transfer tick to the watchdog capture value, make sure the real
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* timeout value is larger than the set timeout value
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* Note: loss some accuracy
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*/
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capture = (tick + WDOG_RESOLUTION - 1) & WDOG_VALID_MASK;
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/* Calculate and save the actual timeout value in milliseconds:
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*
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* timeout = 1000 * (reload + 1) / Fwwdg
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*/
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priv->timeout = capture / (1000 * WDOG_CLK_MHZ);
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priv->capture = capture;
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wdinfo("tick=%lu capture=%lu, actual timeout=%lu\n",
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tick, capture, priv->timeout);
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/* Set capture value to watchdog capture register */
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WDOG_CTRL_REG = (WDOG_CTRL_REG & (~WDOG_CTRL_CAPT_MASK)) |
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((capture >> WDOG_VALID_SHIFT) << WDOG_CTRL_CAPT_SHIFT);
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/* Write 1 to TIMER_STATUS_REG to clear the watch dog */
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BM_SET(TIMER_STATUS_REG, TIMER_STATUS_WDOG_CLR);
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tlsr82_dumpregs("Watchdog settimeout");
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return OK;
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}
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/****************************************************************************
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* Name: tlsr82_capture
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*
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* Description:
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* Don't reset on watchdog timer timeout; instead, call this user provider
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* timeout handler. NOTE: Providing handler==NULL will restore the reset
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* behavior.
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the
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* "lower-half" driver state structure.
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* newhandler - The new watchdog expiration function pointer. If this
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* function pointer is NULL, then the reset-on-expiration
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* behavior is restored,
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*
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* Returned Value:
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* The previous watchdog expiration function pointer or NULL is there was
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* no previous function pointer, i.e., if the previous behavior was
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* reset-on-expiration (NULL is also returned if an error occurs).
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*
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****************************************************************************/
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static xcpt_t tlsr82_capture(struct watchdog_lowerhalf_s *lower,
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xcpt_t handler)
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{
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/* Not support early watchdog expiration interrupt */
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return NULL;
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}
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/****************************************************************************
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* Name: tlsr82_ioctl
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*
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* Description:
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* Any ioctl commands that are not recognized by the "upper-half" driver
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* are forwarded to the lower half driver through this method.
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the "lower-
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* half" driver state structure.
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* cmd - The ioctl command value
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* arg - The optional argument that accompanies the 'cmd'. The
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* interpretation of this argument depends on the particular
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* command.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int tlsr82_ioctl(struct watchdog_lowerhalf_s *lower, int cmd,
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unsigned long arg)
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{
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struct tlsr82_lowerhalf_s *priv = (struct tlsr82_lowerhalf_s *)lower;
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int ret = -ENOTTY;
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DEBUGASSERT(priv);
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wdinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
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/* WDIOC_MINTIME: Set the minimum ping time. If two keepalive ioctls
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* are received within this time, a reset event will be generated.
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* Argument: A 32-bit time value in milliseconds.
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*/
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/* if (cmd == WDIOC_MINTIME) */
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tlsr82_wdginitialize
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*
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* Description:
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* Initialize the WWDG watchdog timer. The watchdog timer is initialized
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* and registers as 'devpath'. The initial state of the watchdog timer is
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* disabled.
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*
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* Input Parameters:
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* devpath - The full path to the watchdog. This should be of the form
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* /dev/watchdog0
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*
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* Returned Value:
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* 0 on Success and Negative number on fail
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*
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****************************************************************************/
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int tlsr82_wdginitialize(const char *devpath)
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{
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struct tlsr82_lowerhalf_s *priv = &g_wdgdev;
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void *driv;
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wdinfo("Entry: devpath=%s\n", devpath);
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if (WDOG_STATUS_REG & WDOG_STATUS_RESET_MASK)
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{
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syslog(LOG_DEBUG, "Reset by Watchdog\n");
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/* Write 1 to clear the watchdog reset bit */
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BM_SET(WDOG_STATUS_REG, WDOG_STATUS_RESET_MASK);
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}
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else
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{
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syslog(LOG_DEBUG, "Reset by Power\n");
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}
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/* Initialize the driver state structure. Here we assume: (1) the state
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* structure lies in .bss and was zeroed at reset time. (2) This function
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* is only called once so it is never necessary to re-zero the structure.
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*/
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priv->ops = &g_wdgops;
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priv->started = false;
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/* Select an arbitrary initial timeout value. But don't start the watchdog
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* yet. NOTE: If the "Hardware watchdog" feature is enabled through the
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* device option bits, the watchdog is automatically enabled at power-on.
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*/
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tlsr82_settimeout((struct watchdog_lowerhalf_s *)priv,
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CONFIG_TLSR82_WDOG_DEFTIMOUT);
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/* Register the watchdog driver as /dev/watchdog0 */
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driv = watchdog_register(devpath, (struct watchdog_lowerhalf_s *)priv);
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if (driv == NULL)
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{
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|
wderr("Watchdog driver register failed, devpath=%s\n", devpath);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* When the microcontroller enters debug mode, the watchdog should be
|
|
* halted, but there is no corresponding configuration in telink chip.
|
|
*/
|
|
|
|
return OK;
|
|
}
|
|
|
|
#endif /* CONFIG_WATCHDOG && CONFIG_TLSR82_WATCHDOG */
|