541 lines
15 KiB
C
541 lines
15 KiB
C
/************************************************************************************
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* configs/hymini-stm32v/src/ssd1289.c
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* arch/arm/src/board/ssd1289.c
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*
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* Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Laurent Latil <laurent@latil.nom.fr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/lcd/lcd.h>
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#include <nuttx/lcd/ssd1289.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "stm32.h"
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#include "hymini_stm32v-internal.h"
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#ifdef CONFIG_LCD_SSD1289
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/**************************************************************************************
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* Pre-processor Definitions
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**************************************************************************************/
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/* Configuration **********************************************************************/
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#ifndef CONFIG_STM32_FSMC
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# error "CONFIG_STM32_FSMC is required to use the LCD"
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#endif
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/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
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* also be enabled.
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*/
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_VERBOSE
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# undef CONFIG_DEBUG_GRAPHICS
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# undef CONFIG_DEBUG_LCD
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#endif
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#ifndef CONFIG_DEBUG_VERBOSE
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# undef CONFIG_DEBUG_LCD
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#endif
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/* Color depth and format */
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#define LCD_BPP 16
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#define LCD_COLORFMT FB_FMT_RGB16_565
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/* Display Resolution */
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#if defined(CONFIG_LCD_LANDSCAPE)
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# define LCD_XRES 320
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# define LCD_YRES 240
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#else
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# define LCD_XRES 240
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# define LCD_YRES 320
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#endif
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#define LCD_BL_TIMER_PERIOD 8999
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/* LCD is connected to the FSMC_Bank1_NOR/SRAM1 and NE1 is used as ship select signal */
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/* RS <==> A16 */
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#define LCD_INDEX 0x60000000 /* RS = 0 */
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#define LCD_DATA 0x60020000 /* RS = 1 */
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/* Debug ******************************************************************************/
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#ifdef CONFIG_DEBUG_LCD
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# define lcddbg dbg
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# define lcdvdbg vdbg
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#else
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# define lcddbg(x...)
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# define lcdvdbg(x...)
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#endif
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/**************************************************************************************
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* Private Type Definition
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**************************************************************************************/
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/**************************************************************************************
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* Private Function Prototypes
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**************************************************************************************/
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/* Low Level LCD access */
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static void stm32_select(FAR struct ssd1289_lcd_s *dev);
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static void stm32_deselect(FAR struct ssd1289_lcd_s *dev);
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static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index);
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev);
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#endif
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static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data);
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static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
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static void stm32_extmemgpios(const uint16_t *gpios, int ngpios);
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static void stm32_enablefsmc(void);
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/**************************************************************************************
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* Private Data
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**************************************************************************************/
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const uint16_t fsmc_gpios[] =
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{
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/* A16... A24 */
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GPIO_NPS_A16, GPIO_NPS_A17, GPIO_NPS_A18, GPIO_NPS_A19, GPIO_NPS_A20,
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GPIO_NPS_A21, GPIO_NPS_A22, GPIO_NPS_A23,
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/* D0... D15 */
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GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3, GPIO_NPS_D4,
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GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, GPIO_NPS_D8, GPIO_NPS_D9,
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GPIO_NPS_D10, GPIO_NPS_D11, GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14,
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GPIO_NPS_D15,
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/* NOE, NWE */
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GPIO_NPS_NOE, GPIO_NPS_NWE,
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/* NE1 */
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GPIO_NPS_NE1
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};
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#define NGPIOS (sizeof(fsmc_gpios)/sizeof(uint16_t))
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/* This is the driver state structure */
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static struct ssd1289_lcd_s g_ssd1289 =
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{
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.select = stm32_select,
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.deselect = stm32_deselect,
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.index = stm32_index,
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#ifndef CONFIG_SSD1289_WRONLY
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.read = stm32_read,
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#endif
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.write = stm32_write,
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.backlight = stm32_backlight
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};
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/* The saved instance of the LCD driver */
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static FAR struct lcd_dev_s *g_ssd1289drvr;
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/**************************************************************************************
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* Private Functions
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**************************************************************************************/
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/**************************************************************************************
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* Name: stm32_select
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*
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* Description:
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* Select the LCD device
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*
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**************************************************************************************/
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static void stm32_select(FAR struct ssd1289_lcd_s *dev)
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{
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/* Does not apply to this hardware */
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}
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/**************************************************************************************
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* Name: stm32_deselect
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*
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* Description:
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* De-select the LCD device
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*
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**************************************************************************************/
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static void stm32_deselect(FAR struct ssd1289_lcd_s *dev)
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{
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/* Does not apply to this hardware */
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}
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/**************************************************************************************
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* Name: stm32_index
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*
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* Description:
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* Set the index register
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*
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**************************************************************************************/
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static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index)
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{
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putreg16((uint16_t)index, LCD_INDEX);
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}
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/**************************************************************************************
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* Name: stm32_read
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*
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* Description:
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* Read LCD data (GRAM data or register contents)
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*
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**************************************************************************************/
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev)
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{
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return getreg16(LCD_DATA);
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}
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#endif
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/**************************************************************************************
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* Name: stm32_write
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*
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* Description:
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* Write LCD data (GRAM data or register contents)
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*
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**************************************************************************************/
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static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data)
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{
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putreg16((uint16_t)data, LCD_DATA);
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}
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/**************************************************************************************
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* Name: stm32_backlight
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*
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* Description:
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* Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on).
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* Used here to set pwm duty on timer used for backlight.
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*
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**************************************************************************************/
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static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power)
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{
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DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
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/* Set new power level */
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if (power > 0)
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{
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uint32_t duty;
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/* Calculate the new backlight duty. It is a fraction of the timer
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* period based on the ration of the current power setting to the
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* maximum power setting.
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*/
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duty = ((uint32_t)LCD_BL_TIMER_PERIOD * (uint32_t)power) / CONFIG_LCD_MAXPOWER;
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if (duty >= LCD_BL_TIMER_PERIOD)
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{
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duty = LCD_BL_TIMER_PERIOD - 1;
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}
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putreg16((uint16_t)duty, STM32_TIM3_CCR2);
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}
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else
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{
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putreg16((uint16_t)0, STM32_TIM3_CCR2);
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}
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}
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static void init_lcd_backlight(void)
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{
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uint16_t ccmr;
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uint16_t ccer;
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/* Configure PB5 as TIM3 CH2 output */
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stm32_configgpio(GPIO_TIM3_CH2OUT);
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/* Enable timer 3 clocking */
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modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM3EN);
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/* Reset timer 3 */
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modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_TIM3RST);
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modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_TIM3RST, 0);
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/* Reset the Counter Mode and set the clock division */
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putreg16(0, STM32_TIM3_CR1);
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/* Set the Autoreload value */
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putreg16(LCD_BL_TIMER_PERIOD, STM32_TIM3_ARR);
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/* Set the Prescaler value */
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putreg16(0, STM32_TIM3_PSC);
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/* Generate an update event to reload the Prescaler value immediatly */
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putreg16(ATIM_EGR_UG, STM32_TIM3_EGR);
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/* Disable the Channel 2 */
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ccer = getreg16(STM32_TIM3_CCER);
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ccer &= ~ATIM_CCER_CC2E;
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putreg16(ccer, STM32_TIM3_CCER);
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/* Select the Output Compare Mode Bits */
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ccmr = getreg16(STM32_TIM3_CCMR1);
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ccmr &= ATIM_CCMR1_OC2M_MASK;
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ccmr |= (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT);
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putreg16(0, STM32_TIM3_CCR2);
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/* Select the output polarity level == HIGH */
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ccer &= !ATIM_CCER_CC2P;
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/* Enable channel 2*/
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ccer |= ATIM_CCER_CC2E;
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/* Write the timer configuration */
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putreg16(ccmr, STM32_TIM3_CCMR1);
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putreg16(ccer, STM32_TIM3_CCER);
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/* Set the auto preload enable bit */
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modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_ARPE);
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/* Enable Backlight Timer !!!!*/
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modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_CEN);
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/* Dump timer3 registers */
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lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
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lcddbg("CR1: %04x\n", getreg32(STM32_TIM3_CR1));
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lcddbg("CR2: %04x\n", getreg32(STM32_TIM3_CR2));
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lcddbg("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR));
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lcddbg("DIER: %04x\n", getreg32(STM32_TIM3_DIER));
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lcddbg("SR: %04x\n", getreg32(STM32_TIM3_SR));
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lcddbg("EGR: %04x\n", getreg32(STM32_TIM3_EGR));
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lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1));
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lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2));
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lcddbg("CCER: %04x\n", getreg32(STM32_TIM3_CCER));
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lcddbg("CNT: %04x\n", getreg32(STM32_TIM3_CNT));
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lcddbg("PSC: %04x\n", getreg32(STM32_TIM3_PSC));
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lcddbg("ARR: %04x\n", getreg32(STM32_TIM3_ARR));
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lcddbg("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1));
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lcddbg("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2));
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lcddbg("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3));
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lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
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lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
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lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
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lcddbg("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR));
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}
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/************************************************************************************
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* Name: stm32_selectlcd
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*
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* Description:
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* Initialize the memory controller (FSMC)
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*
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************************************************************************************/
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static void stm32_selectlcd(void)
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{
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/* Configure new GPIO state */
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stm32_extmemgpios(fsmc_gpios, NGPIOS);
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/* Enable AHB clocking to the FSMC */
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stm32_enablefsmc();
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/* Bank1 NOR/SRAM control register configuration */
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putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
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/* Bank1 NOR/SRAM timing register configuration */
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putreg32(
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FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTRUN(0)| FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA,
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STM32_FSMC_BTR1);
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/* As ext mode is not active the write timing is ignored!! */
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putreg32(0xffffffff, STM32_FSMC_BWTR1);
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/* Enable the bank by setting the MBKEN bit */
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putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN,
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STM32_FSMC_BCR1);
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}
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/************************************************************************************
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* Name: stm32_extmemgpios
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*
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* Description:
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* Initialize GPIOs for NOR or SRAM
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*
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************************************************************************************/
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static void stm32_extmemgpios(const uint16_t *gpios, int ngpios)
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{
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int i;
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/* Configure GPIOs */
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for (i = 0; i < ngpios; i++)
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{
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stm32_configgpio(gpios[i]);
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}
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}
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/************************************************************************************
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* Name: stm32_enablefsmc
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*
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* Description:
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* enable clocking to the FSMC module
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*
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************************************************************************************/
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#ifndef CONFIG_STM32_FSMC
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# error CONFIG_STM32_FSMC is required for LCD support
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#endif
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static void stm32_enablefsmc(void)
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{
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uint32_t regval;
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/* Enable AHB clocking to the FSMC */
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regval = getreg32( STM32_RCC_AHBENR);
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regval |= RCC_AHBENR_FSMCEN;
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putreg32(regval, STM32_RCC_AHBENR);
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}
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/**************************************************************************************
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* Public Functions
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**************************************************************************************/
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/**************************************************************************************
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* Name: up_lcdinitialize
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*
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* Description:
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* Initialize the LCD video hardware. The initial state of the LCD is fully
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* initialized, display memory cleared, and the LCD ready to use, but with the power
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* setting at 0 (full off).
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*
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**************************************************************************************/
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int up_lcdinitialize(void)
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{
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/* Only initialize the driver once */
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if (!g_ssd1289drvr)
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{
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lcdvdbg("Initializing\n");
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init_lcd_backlight();
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/* Configure GPIO pins and configure the FSMC to support the LCD */
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stm32_selectlcd();
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/* Configure and enable the LCD */
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up_mdelay(50);
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g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
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if (!g_ssd1289drvr)
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{
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lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
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return -ENODEV;
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}
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}
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/* Turn the display off */
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g_ssd1289drvr->setpower(g_ssd1289drvr, 0);
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return OK;
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}
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|
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/**************************************************************************************
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|
* Name: up_lcdgetdev
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|
*
|
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* Description:
|
|
* Return a a reference to the LCD object for the specified LCD. This allows support
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* for multiple LCD devices.
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|
*
|
|
**************************************************************************************/
|
|
|
|
FAR struct lcd_dev_s *up_lcdgetdev(int lcddev)
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{
|
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DEBUGASSERT(lcddev == 0);
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return g_ssd1289drvr;
|
|
}
|
|
|
|
/**************************************************************************************
|
|
* Name: up_lcduninitialize
|
|
*
|
|
* Description:
|
|
* Unitialize the LCD support
|
|
*
|
|
**************************************************************************************/
|
|
|
|
void up_lcduninitialize(void)
|
|
{
|
|
/* Turn the display off */
|
|
|
|
g_ssd1289drvr->setpower(g_ssd1289drvr, 0);
|
|
}
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|
|
|
#endif /* CONFIG_LCD_SSD1289 */
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