Xiang Xiao bda6d7f065 arch/arm/include/syscall.h: Add missing inclusion of arch/armv7-r/syscall.h for CortexR.		2019-01-26 07:43:31 -06:00
..
irq_cmnvector.h
irq_lazyfpu.h
irq.h	arch/arm/include/armv-7m/irq.h and armv6-m/irq.h: Remove redundant conditioning on CONFIG_BUILD_PROTECTED	2019-01-26 07:04:15 -06:00
nvicpri.h	arch/arm/include/syscall.h: Add missing inclusion of arch/armv7-r/syscall.h for CortexR.	2019-01-26 07:43:31 -06:00
spinlock.h	i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.	2016-11-26 12:04:02 -06:00
syscall.h	arch/arm/src/include/xxx/syscall.h: Align semi-hosting call style with other syscalls	2019-01-26 07:40:47 -06:00