Lup Yuen Lee bdf60d7966 risc-v/bl808, sg2000: Configure MMU to cache Kernel Text, Data and Heap (T-Head C906) ... This PR configures the BL808 and SG2000 MMU (inside T-Head C906) to cache the the Kernel Text, Data and Heap. We set the MMU Flags (Shareable, Bufferable and Cacheable) as explained in this article: https://lupyuen.github.io/articles/plic3#appendix-mmu-caching-for-t-head-c906 This PR fixes the Slow Memory Access for NuttX Kernel in BL808 and SG2000: https://github.com/apache/nuttx/issues/12696 In the next PR, we will fix the Slow Memory Access for NuttX Apps, by caching the User Text and Data. arch/risc-v/src/bl808/bl808_mm_init.c: Added MMU Flags (Shareable, Bufferable and Cacheable) for BL808 Kernel Text, Data and Heap arch/risc-v/src/sg2000/sg2000_mm_init.c: Added MMU Flags (Shareable, Bufferable and Cacheable) for SG2000 Kernel Text, Data and Heap		2024-07-17 12:08:04 -03:00
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include	riscv: Initial support for debug trigger module	2024-07-14 20:32:19 +08:00
src	risc-v/bl808, sg2000: Configure MMU to cache Kernel Text, Data and Heap (T-Head C906)	2024-07-17 12:08:04 -03:00
CMakeLists.txt	cmake:init RISC-V cmake qemu-rv build	2023-10-26 21:01:46 +08:00
Kconfig	riscv: Initial support for debug trigger module	2024-07-14 20:32:19 +08:00