nuttx/boards/arm/imx6/sabre-6quad/scripts/dramboot.sct
cuiziwei e21885b84a nuttx/boards:Uniform initialization format for init_array.
(1) Keep the `.init_array` and `.ctors` symbols and sort them according to their initialization priority.
(2) Exclude symbols ending with crtend.* and crtbegin.* to support c++
application.if we not exclude crtend.* crtbegin.* frame_dummy will be
added when enable any c++ application with global variables, this symbol
execution is problematic, removing it does not affect the application.

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-08-19 19:48:32 +08:00

131 lines
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#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-a9
/****************************************************************************
* boards/arm/imx6/sabre-6quad/scripts/dramboot.sct
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The i.MX6 has 256 KB of OCRAM beginning at virtual address 0x0090:0000
* This memory configuration, however, loads into the 1GB DDR3 on board
* the Sabre 6Quad K which lies at 0x1000:0000. Code is positioned at
* 0x10800000 which the standard load address of Linux when used with uBoot.
*
* Vectors in low memory are assumed and 16KB of OCRAM is reserved at the
* high end of OCRAM for the page table.
*/
#define DDR3_START 0x10800000
#define DDR3_SIZE 0x000FE000
OSCRAM_SECTIONS DDR3_START DDR3_SIZE
{
text +0
{
*(.vectors,+FIRST)
*(.text)
*(.text.*)
aeabi_sdiv.o
dfixull.o
dnaninf.o
usenofp.o
*(.fixup)
*(.gnu.warning)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
}
init_section AlignExpr(ImageLimit(text), 0x4)
{
KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP(*(.init_array EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o) .ctors))
}
ARM.extab AlignExpr(ImageLimit(init_section), 0x4)
{
*(.ARM.extab*)
}
ARM.exidx AlignExpr(ImageLimit(ARM.extab), 0x4)
{
*(.ARM.exidx*)
*(.gnu.linkonce.armexidx.*)
}
eronly AlignExpr(ImageLimit(ARM.exidx), 0x4)
{
}
tdata AlignExpr(ImageLimit(eronly), 0x4)
{
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
}
tbss AlignExpr(ImageLimit(tdata), 0x4)
{
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
*(.tcommon);
}
data AlignExpr(ImageLimit(tbss), 0x4)
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
}
bss AlignExpr(ImageLimit(data), 0x10)
{
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
*(+ZI)
}
noinit AlignExpr(ImageLimit(bss), 0x100)
{
*(.noinit*)
}
stab 0 { *(.stab) }
stabstr 0 { *(.stabstr) }
stab.excl 0 { *(.stab.excl) }
stab.exclstr 0 { *(.stab.exclstr) }
stab.index 0 { *(.stab.index) }
stab.indexstr 0 { *(.stab.indexstr) }
comment 0 { *(.comment) }
debug_abbrev 0 { *(.debug_abbrev) }
debug_info 0 { *(.debug_info) }
debug_line 0 { *(.debug_line) }
debug_pubnames 0 { *(.debug_pubnames) }
debug_aranges 0 { *(.debug_aranges) }
}