nuttx

History

Gregory Nutt b49be4bb20 Squashed commit of the following: arch/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. sched/ audio/ crypto/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. Documentation/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. fs/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. graphics/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. net/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. drivers/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. include/, syscall/, wireless/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. configs/: Remove all references to CONFIG_DISABLE_POLL. Standard POSIX poll can no longer be disabled.		2019-05-21 18:57:54 -06:00
..
include	configs/*/include; Remove prototype of xyz_boardinitialize() from board.h files. The authorative prototype is in arch/arm/src/xyz/xyz_start.h	2017-12-16 20:47:44 -06:00
nsh	Squashed commit of the following:	2019-05-21 18:57:54 -06:00
scripts	arch/arm/src/sam34: This commit removes support for the dedicated vector handling from the SAM3/4 architecture support. Only common vectors are now supported.	2018-06-19 18:13:15 -06:00
src	Squashed commit of the following:	2019-02-18 15:32:00 -06:00
Kconfig	Add support for the SAM5CMP-DB board	2016-12-04 07:06:17 -06:00
README.txt	Add support for the SAM5CMP-DB board	2016-12-04 07:06:17 -06:00

README.txt

README
^^^^^^

README for NuttX port to the SAM4CMP-DB board.

  http://www.atmel.com/tools/SAM4CMP-DB.aspx

The board is intended to test NuttX SMP features for dual Cortex-M4.


Settings
^^^^^^^^
1. Both CPUs are running at 92.160MHz with PLLB.
2. Serial console can be used via on-board USB-UART (115200/8/N/1)
3. Interrupt handlers such as timer and UART are handled on CPU0
4. Both CPUs share internal SRAM0 (128KB)
5. SRAM1 is used to boot CPU1.
6. Cache controllers are disabled because of no snooping features.

Status
^^^^^^
Currently SMP freature works on the board but is not stable.

1. "nsh> sleep 1 &" works without crash.
2. "nsh> smp " sometimes works but some assertions might happen.
3. "nsh> ostest " causes deadlocks during the test.