222 lines
9.5 KiB
C
222 lines
9.5 KiB
C
/************************************************************************************
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* arch/arm/src/sama5/sama5d2x_pio.h
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* Parallel Input/Output (PIO) definitions for the SAMA5D2 family
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_SAMA5D2X_PIO_H
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#define __ARCH_ARM_SRC_SAMA5_SAMA5D2X_PIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "chip/sam_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#if !defined(CONFIG_SAMA5_PIOA_IRQ) && !defined(CONFIG_SAMA5_PIOB_IRQ) && \
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!defined(CONFIG_SAMA5_PIOC_IRQ) && !defined(CONFIG_SAMA5_PIOD_IRQ)
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# undef CONFIG_SAMA5_PIO_IRQ
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#endif
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_GPIO
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#endif
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#define PIO_HAVE_PULLDOWN 1
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#define PIO_HAVE_PERIPHCD 1
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#define PIO_HAVE_SCHMITT 1
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#define PIO_HAVE_DRIVE 1
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#define SAM_NPIO 4 /* (4) PIOA-D */
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/* Bit-encoded input to sam_configpio() ********************************************/
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/* 32-bit Encoding:
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*
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* .... ...M MMMM CCCC CDDI IISV .PPB BBBB
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*/
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/* Input/Output mode:
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*
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* .... ...M MMMM .... .... .... .... ....
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*/
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#define PIO_MODE_SHIFT (20) /* Bits 20-24: PIO mode */
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#define PIO_MODE_MASK (15 << PIO_MODE_SHIFT)
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# define PIO_INPUT (0 << PIO_MODE_SHIFT) /* Input */
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# define PIO_OUTPUT (1 << PIO_MODE_SHIFT) /* Output */
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# define PIO_ANALOG (2 << PIO_MODE_SHIFT) /* Analog */
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# define PIO_PERIPHA (3 << PIO_MODE_SHIFT) /* Controlled by periph A signal */
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# define PIO_PERIPHB (4 << PIO_MODE_SHIFT) /* Controlled by periph B signal */
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# define PIO_PERIPHC (5 << PIO_MODE_SHIFT) /* Controlled by periph C signal */
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# define PIO_PERIPHD (6 << PIO_MODE_SHIFT) /* Controlled by periph D signal */
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# define PIO_PERIPHE (7 << PIO_MODE_SHIFT) /* Controlled by periph E signal */
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# define PIO_PERIPHF (8 << PIO_MODE_SHIFT) /* Controlled by periph F signal */
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/* These bits set the configuration of the pin:
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* NOTE: No definitions for parallel capture mode
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*
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* .... .... .... CCCC C... .... .... ....
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*/
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#define PIO_CFG_SHIFT (15) /* Bits 15-19: PIO configuration bits */
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#define PIO_CFG_MASK (31 << PIO_CFG_SHIFT)
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# define PIO_CFG_DEFAULT (0 << PIO_CFG_SHIFT) /* Default, no attribute */
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# define PIO_CFG_PULLUP (1 << PIO_CFG_SHIFT) /* Bit 15: Internal pull-up */
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# define PIO_CFG_PULLDOWN (2 << PIO_CFG_SHIFT) /* Bit 16: Internal pull-down */
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# define PIO_CFG_DEGLITCH (4 << PIO_CFG_SHIFT) /* Bit 17: Internal glitch filter */
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# define PIO_CFG_OPENDRAIN (8 << PIO_CFG_SHIFT) /* Bit 18: Open drain */
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# define PIO_CFG_SCHMITT (16 << PIO_CFG_SHIFT) /* Bit 19: Schmitt trigger */
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/* Drive Strength:
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*
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* .... .... .... .... .DD. .... .... ....
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*/
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#define PIO_DRIVE_SHIFT (13) /* Bits 13-14: Drive strength */
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#define PIO_DRIVE_MASK (7 << PIO_DRIVE_SHIFT)
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# define PIO_DRIVE_LOW (0 << PIO_DRIVE_SHIFT)
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# define PIO_DRIVE_MEDIUM (2 << PIO_DRIVE_SHIFT)
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# define PIO_DRIVE_HIGH (3 << PIO_DRIVE_SHIFT)
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/* Additional interrupt modes:
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*
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* .... .... .... .... ...I II.. .... ....
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*/
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#define PIO_INT_SHIFT (10) /* Bits 9-12: PIO interrupt bits */
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#define PIO_INT_MASK (7 << PIO_INT_SHIFT)
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# define _PIO_INT_AIM (1 << 10) /* Bit 10: Additional Interrupt modes */
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# define _PIO_INT_LEVEL (1 << 9) /* Bit 9: Level detection interrupt */
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# define _PIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */
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# define _PIO_INT_RH (1 << 8) /* Bit 9: Rising edge/High level detection interrupt */
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# define _PIO_INT_FL (0) /* (vs. Falling edge/Low level detection interrupt) */
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# define PIO_INT_HIGHLEVEL (_PIO_INT_AIM | _PIO_INT_LEVEL | _PIO_INT_RH)
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# define PIO_INT_LOWLEVEL (_PIO_INT_AIM | _PIO_INT_LEVEL | _PIO_INT_FL)
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# define PIO_INT_RISING (_PIO_INT_AIM | _PIO_INT_EDGE | _PIO_INT_RH)
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# define PIO_INT_FALLING (_PIO_INT_AIM | _PIO_INT_EDGE | _PIO_INT_FL)
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# define PIO_INT_BOTHEDGES (0)
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/* If the pin is an interrupt, then this determines if the pin is a secure interrupt:
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*
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* .... .... .... .... .... ..S. .... ....
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*/
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#ifdef SAMA5_SAIC
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# define PIO_INT_SECURE (1 << 9) /* Bit 9: Secure interrupt */
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#else
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# define PIO_INT_SECURE (0)
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#endif
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#define PIO_INT_UNSECURE (0)
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/* If the pin is an PIO output, then this identifies the initial output value:
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*
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* .... .... .... .... .... ...V .... ....
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*/
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#define PIO_OUTPUT_SET (1 << 8) /* Bit 8: Initial value of output */
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#define PIO_OUTPUT_CLEAR (0)
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/* This identifies the PIO port:
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*
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* .... .... .... .... .... .... .PP. ....
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*/
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#define PIO_PORT_SHIFT (5) /* Bit 5-6: Port number */
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#define PIO_PORT_MASK (3 << PIO_PORT_SHIFT)
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# define PIO_PORT_PIOA (0 << PIO_PORT_SHIFT)
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# define PIO_PORT_PIOB (1 << PIO_PORT_SHIFT)
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# define PIO_PORT_PIOC (2 << PIO_PORT_SHIFT)
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# define PIO_PORT_PIOD (3 << PIO_PORT_SHIFT)
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/* This identifies the bit in the port:
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*
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* .... .... .... .... .... .... ...B BBBB
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*/
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#define PIO_PIN_SHIFT (0) /* Bits 0-4: PIO number: 0-31 */
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#define PIO_PIN_MASK (31 << PIO_PIN_SHIFT)
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#define PIO_PIN0 (0 << PIO_PIN_SHIFT)
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#define PIO_PIN1 (1 << PIO_PIN_SHIFT)
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#define PIO_PIN2 (2 << PIO_PIN_SHIFT)
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#define PIO_PIN3 (3 << PIO_PIN_SHIFT)
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#define PIO_PIN4 (4 << PIO_PIN_SHIFT)
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#define PIO_PIN5 (5 << PIO_PIN_SHIFT)
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#define PIO_PIN6 (6 << PIO_PIN_SHIFT)
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#define PIO_PIN7 (7 << PIO_PIN_SHIFT)
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#define PIO_PIN8 (8 << PIO_PIN_SHIFT)
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#define PIO_PIN9 (9 << PIO_PIN_SHIFT)
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#define PIO_PIN10 (10 << PIO_PIN_SHIFT)
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#define PIO_PIN11 (11 << PIO_PIN_SHIFT)
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#define PIO_PIN12 (12 << PIO_PIN_SHIFT)
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#define PIO_PIN13 (13 << PIO_PIN_SHIFT)
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#define PIO_PIN14 (14 << PIO_PIN_SHIFT)
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#define PIO_PIN15 (15 << PIO_PIN_SHIFT)
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#define PIO_PIN16 (16 << PIO_PIN_SHIFT)
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#define PIO_PIN17 (17 << PIO_PIN_SHIFT)
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#define PIO_PIN18 (18 << PIO_PIN_SHIFT)
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#define PIO_PIN19 (19 << PIO_PIN_SHIFT)
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#define PIO_PIN20 (20 << PIO_PIN_SHIFT)
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#define PIO_PIN21 (21 << PIO_PIN_SHIFT)
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#define PIO_PIN22 (22 << PIO_PIN_SHIFT)
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#define PIO_PIN23 (23 << PIO_PIN_SHIFT)
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#define PIO_PIN24 (24 << PIO_PIN_SHIFT)
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#define PIO_PIN25 (25 << PIO_PIN_SHIFT)
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#define PIO_PIN26 (26 << PIO_PIN_SHIFT)
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#define PIO_PIN27 (27 << PIO_PIN_SHIFT)
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#define PIO_PIN28 (28 << PIO_PIN_SHIFT)
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#define PIO_PIN29 (29 << PIO_PIN_SHIFT)
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#define PIO_PIN30 (30 << PIO_PIN_SHIFT)
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#define PIO_PIN31 (31 << PIO_PIN_SHIFT)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/* Must be big enough to hold the 32-bit encoding */
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typedef uint32_t pio_pinset_t;
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#endif /* __ARCH_ARM_SRC_SAMA5_SAMA5D2X_PIO_H */
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