b11a5ca8b2
Co-authored-by: Dong Heng <dongheng@espressif.com> Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
64 lines
2.9 KiB
C
64 lines
2.9 KiB
C
/****************************************************************************
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* arch/risc-v/include/rv32im/mcause.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_INCLUDE_RV32IM_MCAUSE_H
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#define __ARCH_RISCV_INCLUDE_RV32IM_MCAUSE_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Interrupt(BIT31) or Exception(0) */
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#define MCAUSE_INTERRUPT (1 << 31)
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#define MCAUSE_INTERRUPT_MASK (~MCAUSE_INTERRUPT)
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/* Exception values *********************************************************/
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#define MCAUSE_ADDE_MISALIGNED (0) /* Instruction address misaligned */
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#define MCAUSE_INST_ACCESS_FAULT (1) /* Instruction access fault */
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#define MCAUSE_ILLEGAL_INST (2) /* Illegal instruction */
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#define MCAUSE_BREAKPOINT (3) /* Breakpoint */
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#define MCAUSE_LOAD_MISALIGNED (4) /* Load address misaligned */
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#define MCAUSE_LOAD_ACCESS_FAULT (5) /* Load access fault */
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#define MCAUSE_STORE_MISALIGNED (6) /* Store/AMO address misaligned */
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#define MCAUSE_STORE_ACCESS_FAULT (7) /* Store/AMO access fault */
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#define MCAUSE_ECALL_U (8) /* Environment call from U-mode */
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#define MCAUSE_ECALL_S (9) /* Environment call from S-mode */
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#define MCAUSE_RESERVED (10) /* Reserved */
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#define MCAUSE_ECALL_M (11) /* Environment call from M-mode */
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#define MCAUSE_INST_PAGE_FAULT (12) /* Instruction page fault */
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#define MCAUSE_LOAD_PAGE_FAULT (13) /* Load page fault */
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#define MCAUSE_RESERVED (14) /* Reserved */
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#define MCAUSE_STORE_PAGE_FAULT (15) /* Store/AMO page fault */
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/* Max RISC-V defined mcause exception values. */
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#define MCAUSE_MAX_EXCEPTION (15)
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#endif /* __ARCH_RISCV_INCLUDE_RV32IM_MCAUSE_H */
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