ebe961df9e
Add a static port-based VLAN configuration for KSZ9477 switch. This doesn't use the VLAN tagging, but is a switch's internal mechanism to simply configure if the packet forwarding is allowed from one port to another. Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
385 lines
10 KiB
C
385 lines
10 KiB
C
/****************************************************************************
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* drivers/net/ksz9477.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <errno.h>
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#include <nuttx/net/ksz9477.h>
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#include "ksz9477_reg.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifdef CONFIG_NET_KSZ9477_PORT_VLAN
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static uint8_t g_port_vlan_config[] =
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{
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CONFIG_NET_KSZ9477_PORT_VLAN_PHY1,
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CONFIG_NET_KSZ9477_PORT_VLAN_PHY2,
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CONFIG_NET_KSZ9477_PORT_VLAN_PHY3,
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CONFIG_NET_KSZ9477_PORT_VLAN_PHY4,
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CONFIG_NET_KSZ9477_PORT_VLAN_PHY5,
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CONFIG_NET_KSZ9477_PORT_VLAN_RMII,
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CONFIG_NET_KSZ9477_PORT_VLAN_SGMII
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static uint16_t bswap16(uint16_t data)
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{
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return (data << 8) | (data >> 8);
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}
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static uint32_t bswap32(uint32_t data)
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{
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return (data << 24) | (data >> 24) | ((data << 8) & 0xff0000) |
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((data >> 8) & 0xff00);
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}
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#if 0 /* Enable when needed */
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static int ksz9477_reg_read8(uint16_t reg, uint8_t *data)
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{
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int ret;
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struct ksz9477_transfer_s read_msg;
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read_msg.len = 3;
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read_msg.reg = bswap16(reg);
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ret = ksz9477_read(&read_msg);
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*data = read_msg.data;
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return ret;
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}
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#endif
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static int ksz9477_reg_read16(uint16_t reg, uint16_t *data)
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{
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int ret;
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struct ksz9477_transfer_s read_msg;
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read_msg.len = 4;
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read_msg.reg = bswap16(reg);
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ret = ksz9477_read(&read_msg);
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*data = bswap16(read_msg.data);
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return ret;
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}
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static int ksz9477_reg_read32(uint16_t reg, uint32_t *data)
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{
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int ret;
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struct ksz9477_transfer_s read_msg;
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read_msg.len = 6;
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read_msg.reg = bswap16(reg);
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ret = ksz9477_read(&read_msg);
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*data = bswap32(read_msg.data);
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return ret;
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}
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#if 0 /* Enable when needed */
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static int ksz9477_reg_write8(uint16_t reg, uint8_t data)
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{
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struct ksz9477_transfer_s write_msg;
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write_msg.len = 3;
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write_msg.reg = bswap16(reg);
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write_msg.data = data;
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return ksz9477_write(&write_msg);
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}
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#endif
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static int ksz9477_reg_write32(uint16_t reg, uint32_t data)
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{
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struct ksz9477_transfer_s write_msg;
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write_msg.len = 6;
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write_msg.reg = bswap16(reg);
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write_msg.data = bswap32(data);
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return ksz9477_write(&write_msg);
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}
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#if 0 /* Enable when needed */
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static int ksz9477_reg_write16(uint16_t reg, uint16_t data)
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{
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int ret;
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struct ksz9477_transfer_s write_msg;
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uint16_t addr = reg;
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uint32_t data32;
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/* Errata: 16-bit writes to registers 0xN120-0xN13f will corrupt the
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* adjacent regsters. Workaround: perform only 32-bit writes to this
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* area
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*/
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if ((reg & 0xfff) >= 0x120 && (reg & 0xfff) <= 0x13f)
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{
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/* Align write on lower 16-byte boundary */
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addr = reg & (~1);
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/* Read the full 32-bit register */
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ret = ksz9477_reg_read32(addr, &data32);
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if (ret != OK)
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{
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return ret;
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}
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/* Inject the data to the 32-bit write data */
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if (reg & 1)
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{
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data32 = (data32 & 0xff0000ff) | ((uint32_t)data << 8);
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}
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else
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{
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data32 = (data32 & 0xffff0000) | data;
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}
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write_msg.len = 6;
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write_msg.data = bswap32(data32);
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}
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else
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{
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write_msg.len = 4;
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write_msg.data = bswap16(data);
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}
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write_msg.reg = bswap16(reg);
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return ksz9477_write(&write_msg);
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}
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#endif
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static int ksz9477_sgmii_read_indirect(uint32_t address, uint16_t *value,
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unsigned len)
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{
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int ret;
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uint32_t data;
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address |= SGMII_PORT_ADDRESS_AUTO_INC_ENB;
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ret = ksz9477_reg_write32(KSZ9477_SGMII_PORT_ADDRESS, address);
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while (len-- && ret == OK)
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{
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ret = ksz9477_reg_read32(KSZ9477_SGMII_PORT_DATA, &data);
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*value++ = (uint16_t)data;
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}
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return ret;
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}
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static int ksz9477_sgmii_write_indirect(uint32_t address, uint16_t *value,
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unsigned len)
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{
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int ret;
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uint32_t data;
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address |= SGMII_PORT_ADDRESS_AUTO_INC_ENB;
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ret = ksz9477_reg_write32(KSZ9477_SGMII_PORT_ADDRESS, address);
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while (len-- && ret == OK)
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{
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data = *value++;
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ret = ksz9477_reg_write32(KSZ9477_SGMII_PORT_DATA, data);
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: ksz9477_enable_port_vlan
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*
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* Description:
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* Enables static port-based VLAN, which can be configured in the switch
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* queue management's port control registers
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* OK or negative error number
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*
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****************************************************************************/
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int ksz9477_enable_port_vlan(void)
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{
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uint32_t reg;
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int ret = ksz9477_reg_read32(KSZ9477_Q_MGMT_CONTROL0, ®);
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if (ret)
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{
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reg |= KSZ9477_Q_MGMT_PORT_VLAN_ENABLE;
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ret = ksz9477_reg_write32(KSZ9477_Q_MGMT_CONTROL0, reg);
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}
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return ret;
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}
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/****************************************************************************
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* Name: ksz9477_disable_port_vlan
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*
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* Description:
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* Disables the static port-based VLAN
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* OK or negative error number
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*
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****************************************************************************/
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int ksz9477_disable_port_vlan(void)
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{
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uint32_t reg;
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int ret = ksz9477_reg_read32(KSZ9477_Q_MGMT_CONTROL0, ®);
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if (ret)
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{
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reg &= ~KSZ9477_Q_MGMT_PORT_VLAN_ENABLE;
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ret = ksz9477_reg_write32(KSZ9477_Q_MGMT_CONTROL0, reg);
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}
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return ret;
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}
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/****************************************************************************
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* Name: ksz9477_configure_port_vlan
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*
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* Description:
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* Configures the static port-based VLAN for a single port
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* The change will become effective next time when the switch is
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* initialized.
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*
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* Input Parameters:
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* port: The port being configured (1-7)
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* disable: Bitmask of ports where frames may not be forwarded to.
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* Bit 0 is for port 1, bit 1 for port 2 etc.
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* enable: Bitmask of ports where frames may be forwarded to.
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* Bit 0 is for port 1, bit 1 for port 2 etc.
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*
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* Returned Value:
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* OK or negative error number
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*
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****************************************************************************/
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int ksz9477_configure_port_vlan(ksz9477_port_t port, uint8_t disable,
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uint8_t enable)
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{
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if (port < KSZ9477_PORT_PHY1 || port > KSZ9477_PORT_SGMII)
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{
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return -EINVAL;
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}
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g_port_vlan_config[port - KSZ9477_PORT_PHY1] &= ~disable;
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g_port_vlan_config[port - KSZ9477_PORT_PHY1] |= enable;
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return OK;
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}
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/****************************************************************************
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* Name: ksz9477_init
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*
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* Description:
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* Switches the ksz9477's SGMII port into PHY mode and sets the
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* default settings to work directly with an external MAC
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*
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* Input Parameters:
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* master_port: Port connected to the host MAC
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*
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* Returned Value:
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* OK or negative error number
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*
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****************************************************************************/
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int ksz9477_init(ksz9477_port_t master_port)
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{
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int ret;
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int i;
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uint16_t regval16;
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uint32_t regval32;
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/* Read the ID registers */
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ret = ksz9477_reg_read16(KSZ9477_ID1, ®val16);
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if (ret != OK || regval16 != KSZ9477_ID)
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{
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nerr("Device not found, id %x, ret %d\n", regval16, ret);
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return ret ? ret : -EINVAL;
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}
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/* Check that the SGMII block is alive and indirect accesses work */
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ret = ksz9477_sgmii_read_indirect(KSZ9477_SGMII_ID1,
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(uint16_t *)®val32, 2);
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if (ret != OK || regval32 != SGMII_PHY_ID)
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{
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nerr("SGMII port access failure, id %x, ret %d\n", regval32, ret);
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return ret ? ret : -EINVAL;
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}
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if (master_port == KSZ9477_PORT_SGMII)
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{
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/* Set the switch's SGMII port into "PHY" mode and enable link */
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regval16 = (SGMII_AUTONEG_CONTROL_PCS_SGMII |
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SGMII_AUTONEG_CONTROL_TC_MASTER |
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SGMII_AUTONEG_CONTROL_LINK_STATUS);
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ret = ksz9477_sgmii_write_indirect(KSZ9477_SGMII_AUTONEG_CONTROL,
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®val16, 1);
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/* Write to autonegotiation advertisement register activates the new
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* setting. Advertise only full duplex.
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*/
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regval16 = SGMII_AUTONEG_ADVERTISE_FD;
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ret = ksz9477_sgmii_write_indirect(KSZ9477_SGMII_AUTONEG_ADVERTISE,
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®val16, 1);
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}
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/* Configure the static port-based VLANs */
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#ifdef CONFIG_NET_KSZ9477_PORT_VLAN
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/* Restrict traffic according to Q_MGMT_PORT_CONTROL1 registers */
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ret = ksz9477_enable_port_vlan();
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/* Configure traffic control for each port */
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for (i = 0; ret == OK && i < 7; i++)
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{
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ret = ksz9477_reg_write32(
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KSZ9477_Q_MGMT_PORT_CONTROL1(KSZ9477_PORT_PHY1 + i),
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g_port_vlan_config[i]);
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}
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#endif
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return ret;
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}
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