89 lines
4.3 KiB
C
89 lines
4.3 KiB
C
/****************************************************************************
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* arch/arm/src/str71x/str71x_emi.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STR71X_STR71X_EMI_H
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#define __ARCH_ARM_SRC_STR71X_STR71X_EMI_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "str71x_map.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* External Memory Interfac (EMI) register offset ***************************/
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#define STR71X_EMI_BCON0_OFFSET (0x0000) /* 16-bits wide */
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#define STR71X_EMI_BCON1_OFFSET (0x0004) /* 16-bits wide */
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#define STR71X_EMI_BCON2_OFFSET (0x0008) /* 16-bits wide */
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#define STR71X_EMI_BCON3_OFFSET (0x000c) /* 16-bits wide */
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/* External Memory Interfac (EMI) register addresses ************************/
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#define STR71X_EMI_BCON0 (STR71X_EMI_BASE + STR71X_EMI_BCON0_OFFSET)
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#define STR71X_EMI_BCON1 (STR71X_EMI_BASE + STR71X_EMI_BCON1_OFFSET)
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#define STR71X_EMI_BCON2 (STR71X_EMI_BASE + STR71X_EMI_BCON2_OFFSET)
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#define STR71X_EMI_BCON3 (STR71X_EMI_BASE + STR71X_EMI_BCON3_OFFSET)
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/* Register bit settings ****************************************************/
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/* Bank-N configuration register (BCONn) bit definitions */
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#define STR71X_EMIBCON_BSIZEMASK (0x0003) /* Bits 0-1: Bank size */
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#define STR71X_EMIBCON_BSIZE8 (0x0000) /* 8-bit */
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#define STR71X_EMIBCON_BSIZE16 (0x0001) /* 16-bit */
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#define STR71X_EMIBCON_WSMASK (0x003c) /* Bits 2-5: Wait states */
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#define STR71X_EMIBCON_WS0 (0x0000) /* 0 waitstates */
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#define STR71X_EMIBCON_WS1 (0x0004) /* 1 waitstates */
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#define STR71X_EMIBCON_WS2 (0x0008) /* 2 waitstates */
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#define STR71X_EMIBCON_WS3 (0x000c) /* 3 waitstates */
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#define STR71X_EMIBCON_WS4 (0x0010) /* 4 waitstates */
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#define STR71X_EMIBCON_WS5 (0x0014) /* 5 waitstates */
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#define STR71X_EMIBCON_WS6 (0x0018) /* 6 waitstates */
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#define STR71X_EMIBCON_WS7 (0x001c) /* 7 waitstates */
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#define STR71X_EMIBCON_WS8 (0x0020) /* 8 waitstates */
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#define STR71X_EMIBCON_WS9 (0x0024) /* 9 waitstates */
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#define STR71X_EMIBCON_WS10 (0x0028) /* 10 waitstates */
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#define STR71X_EMIBCON_WS11 (0x002c) /* 11 waitstates */
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#define STR71X_EMIBCON_WS12 (0x0030) /* 12 waitstates */
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#define STR71X_EMIBCON_WS13 (0x0034) /* 13 waitstates */
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#define STR71X_EMIBCON_WS14 (0x0038) /* 14 waitstates */
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#define STR71X_EMIBCON_WS15 (0x003c) /* 15 waitstates */
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#define STR71X_EMIBCON_ENABLE (0x8000) /* Bit 15: Bank enable */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_STR71X_STR71X_EMI_H */
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