Tiago Medicci Serrano c60d5c2ea1 esp32s3/wireless: Fix typo ... The CPU 2 interrupt source (which is not used for anything else) is used to off-load BLE data after a SPI flash operation.		2023-11-10 09:11:35 +08:00
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include	xtensa/esp32s3: Disable psram as task stack	2023-11-08 16:25:57 -03:00
src	esp32s3/wireless: Fix typo	2023-11-10 09:11:35 +08:00
Kconfig	xtensa/esp32s2: Add rtc heap support	2023-11-09 23:58:30 +08:00