a1c991d921
Move boards to boards folder
* boards: rename configs folder to boards
This is the proposed layout after the change:
boards: - folder containing board folders
<board>: - name of each board
drivers: - extra drivers specific for platform
include: - header files for the boars
scripts: - extra scripts specific for platform
src: - board specific code
tools: - extra tools specific for platform
<config>: - board specific configuration(s)
Note:
<xxx> names are dependent on platform
This is a logical change to aim to the arch layout but this is a
huge change it should be done in several steps to lower the risk.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Kconfig: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile.*: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Make.defs: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .sh: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .mk: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .c & .h: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .bat: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
381 lines
14 KiB
C
381 lines
14 KiB
C
/************************************************************************************
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* boards/lpc4088-quickstart/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __CONFIG_LPC4088_QUICKSTART_INCLUDE_BOARD_H
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#define __CONFIG_LPC4088_QUICKSTART_INCLUDE_BOARD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_40_GPIOIRQ)
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# include <nuttx/irq.h>
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#endif
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Clocking *************************************************************************/
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/* NOTE: The following definitions require lpc17_40_syscon.h. It is not included here
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* because the including C file may not have that file in its include path.
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*/
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#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */
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#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */
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#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */
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#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */
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#define BOARD_WDTOSC_FREQUENCY (500000) /* WDT oscillator frequency */
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/* This is the clock setup we configure for:
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*
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* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
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* PLL0CLK = (10 * SYSCLK) / 1 = 120MHz -> PLL0 multipler=10, pre-divider=1
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* CCLCK = 120MHz -> CCLK divider = 1
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*/
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#define LPC17_40_CCLK 120000000 /* 120Mhz */
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#define BOARD_PCLKDIV 2 /* Peripheral clock = LPC17_40_CCLK/2 */
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#define BOARD_PCLK_FREQUENCY (LPC17_40_CCLK / BOARD_PCLKDIV)
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/* Select the main oscillator as the frequency source. SYSCLK is then the frequency
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* of the main oscillator.
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*
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* If BOARD_XTAL_FREQUENCY > 15000000, then the SCS OSCRS bit (bit 4) should also
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* be set in the BOARD_SCS_VALUE.
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*/
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#undef CONFIG_LPC17_40_MAINOSC
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#define CONFIG_LPC17_40_MAINOSC 1
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#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN
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/* Select the main oscillator and CCLK divider. The output of the divider is CCLK.
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* The input to the divider (PLLCLK) will be determined by the PLL output.
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*/
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#define BOARD_CCLKSEL_DIVIDER 1
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#define BOARD_CCLKSEL_VALUE (BOARD_CCLKSEL_DIVIDER | SYSCON_CCLKSEL_CCLKSEL)
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/* PLL0. PLL0 is used to generate the CPU clock (PLLCLK).
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*
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* Source clock: Main oscillator
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* PLL0 Multiplier value (M): 10
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* PLL0 Pre-divider value (P): 1
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*
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* PLL0CLK = (M * SYSCLK) = 120MHz
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*/
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#undef CONFIG_LPC17_40_PLL0
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#define CONFIG_LPC17_40_PLL0 1
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#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN
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#define BOARD_PLL0CFG_MSEL 10
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#define BOARD_PLL0CFG_PSEL 1
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#define BOARD_PLL0CFG_VALUE \
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(((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLLCFG_MSEL_SHIFT) | \
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((BOARD_PLL0CFG_PSEL-1) << SYSCON_PLLCFG_PSEL_SHIFT))
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/* PLL1 : PLL1 is used to generate clock for the USB */
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#undef CONFIG_LPC17_40_PLL1
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#define BOARD_PLL1CFG_MSEL 4
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#define BOARD_PLL1CFG_PSEL 2
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#define BOARD_PLL1CFG_VALUE \
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(((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLLCFG_MSEL_SHIFT) | \
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((BOARD_PLL1CFG_PSEL-1) << SYSCON_PLLCFG_PSEL_SHIFT))
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#ifdef CONFIG_LPC17_40_EMC
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/* EMC clock selection.
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*
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* The EMC clock should not be driven above 80MHz. As a result the EMC
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* uses the CPU clock divided by two.
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*/
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# define BOARD_EMCCLKSEL_DIVIDER 2
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# define BOARD_EMCCLKSEL_VALUE SYSCON_EMCCLKSEL_CCLK_DIV2
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# define LPC17_40_EMCCLK (LPC17_40_CCLK / BOARD_EMCCLKSEL_DIVIDER)
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#endif
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#if defined(CONFIG_LPC17_40_USBHOST) || (CONFIG_LPC17_40_USBDEV)
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/* USB divider. The output of the PLL is used as the USB clock
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*
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* USBCLK = PLL1CLK = (SYSCLK * 4) = 48MHz
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*/
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# define BOARD_USBCLKSEL_DIVIDER 1
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# define BOARD_USBCLKSEL_VALUE (SYSCON_USBCLKSEL_USBDIV_DIV1 | \
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SYSCON_USBCLKSEL_USBSEL_PLL1)
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#endif
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/* FLASH Configuration */
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#undef CONFIG_LPC17_40_FLASH
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#define CONFIG_LPC17_40_FLASH 1
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/* Flash access use 6 CPU clocks - Safe for any allowed conditions */
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#define BOARD_FLASHCFG_VALUE (SYSCON_FLASHCFG_TIM_5 | 0x03a)
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/* Ethernet configuration */
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#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV48
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/* Set EMC delay values:
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*
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* CMDDLY: Programmable delay value for EMC outputs in command delayed
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* mode. The delay amount is roughly CMDDLY * 250 picoseconds.
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* FBCLKDLY: Programmable delay value for the feedback clock that controls
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* input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250
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* picoseconds.
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* CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
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* typically be used in clock delayed mode. The delay amount is roughly
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* (CLKOUT0DLY+1) * 250 picoseconds.
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* CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
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* typically be used in clock delayed mode. The delay amount is roughly
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* (CLKOUT1DLY+1) * 250 picoseconds.
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*
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* Optimal for NOR: {1,1,1,1}
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* Needed for NAND and SDRAM: {17,1,2,1}
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*/
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#ifdef CONFIG_LPC17_40_EMC
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#if defined(CONFIG_LPC17_40_EXTNAND) || defined(CONFIG_LPC17_40_EXTDRAM)
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# define BOARD_CMDDLY 17
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# define BOARD_FBCLKDLY 17
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# define BOARD_CLKOUT0DLY 1
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# define BOARD_CLKOUT1DLY 1
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#else
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# define BOARD_CMDDLY 1
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# define BOARD_FBCLKDLY 1
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# define BOARD_CLKOUT0DLY 1
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# define BOARD_CLKOUT1DLY 1
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#endif
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#endif
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/* LED definitions ******************************************************************/
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/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
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* any way. The following definitions are used to access individual LEDs.
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*
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* LED1 : Connected to P1[18]
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* LED2 : Connected to P0[13]
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* LED3 : Connected to P1[13]
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* LED4 : Connected to P2[19]
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*
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* These LEDs are connecte to ground so a high output value will illuminate them.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_LED3 2
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#define BOARD_LED4 3
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#define BOARD_NLEDS 4
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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#define BOARD_LED3_BIT (1 << BOARD_LED3)
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#define BOARD_LED4_BIT (1 << BOARD_LED4)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the four LEDs
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* on the LPC4088 QuickStart board. The following definitions describe how NuttX
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* controls the LEDs:
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*/
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/* LED1 LED2 LED3 LED4 */
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#define LED_STARTED 0 /* OFF OFF OFF OFF */
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#define LED_HEAPALLOCATE 1 /* ON OFF OFF OFF */
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#define LED_IRQSENABLED 2 /* OFF ON OFF OFF */
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#define LED_STACKCREATED 3 /* ON ON OFF OFF */
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#define LED_INIRQ 4 /* LED3 glows, on while in interrupt */
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#define LED_SIGNAL 4 /* LED3 glows, on while in signal handler */
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#define LED_ASSERTION 4 /* LED3 glows, on while in assertion */
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#define LED_PANIC 4 /* LED3 Flashes at 2Hz */
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#define LED_IDLE 5 /* LED4 glows: ON while active *
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* OFF while sleeping */
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/* Button definitions ***************************************************************/
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/* The LPC4088 QuickStart supports a single button. It must be pulled up by the MCU.
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* When closed, the pin will be pulled to ground. So the button will read "1"
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* when open and "0" when closed. The button is capable of generating an
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* interrupt.
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*
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* USER1 -- Connected to P2[10]
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*
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* For the interrupting buttons, interrupts are generated on both edges (press and
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* release).
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*/
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#define BOARD_BUTTON_USER1 0
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#define NUM_BUTTONS 1
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#define BOARD_BUTTON_USER1_BIT (1 << BOARD_BUTTON_USER1)
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/* Alternate pin selections *********************************************************/
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/* UART0:
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*
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* TX --- Connected to P0[2]
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* RX --- Connected to P0[3]
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*/
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#define GPIO_UART0_TXD GPIO_UART0_TXD_2
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#define GPIO_UART0_RXD GPIO_UART0_RXD_2
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/* UART1:
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*
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* RTS --- Connected to P0[22]
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* RI --- Connected to P0[21]
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* DSR --- Connected to P0[19]
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* DCD --- Connected to P0[18]
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* CTS --- Connected to P0[17]
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* DTR --- Connected to P0[20]
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* TXD --- Connected to P0[15]
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* RXD --- Connected to P0[16]
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*/
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#define GPIO_UART1_RTS GPIO_UART1_RTS_2
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#define GPIO_UART1_RI GPIO_UART1_RI_1
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#define GPIO_UART1_DSR GPIO_UART1_DSR_1
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#define GPIO_UART1_DCD GPIO_UART1_DCD_1
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#define GPIO_UART1_CTS GPIO_UART1_CTS_1
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#define GPIO_UART1_DTR GPIO_UART1_DTR_1
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#define GPIO_UART1_TXD GPIO_UART1_TXD_1
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#define GPIO_UART1_RXD GPIO_UART1_RXD_1
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/* Ethernet:
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* MDC --- Connected to P1[16]
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* MDIO --- Connected to P1[17]
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*/
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#define GPIO_ENET_MDC GPIO_ENET_MDC_1
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#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1
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/* External LCD is currently untested.
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* These pins will probably need to be updated before using the LCD. */
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#if 0
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/* LCD R:
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*
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* VD0 --- Connected to P0[4]
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* VD1 --- Connected to P0[5]
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* VD2 --- Connected to P4[28]
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* VD3 --- Connected to P4[29]
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* VD4 --- Connected to P2[6]
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* VD5 --- Connected to P2[7]
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* VD6 --- Connected to P2[8]
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* VD7 --- Connected to P2[9]
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*/
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#define GPIO_LCD_VD0 GPIO_LCD_VD0_1
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#define GPIO_LCD_VD1 GPIO_LCD_VD1_1
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#define GPIO_LCD_VD2 GPIO_LCD_VD2_2
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#define GPIO_LCD_VD3 GPIO_LCD_VD3_3
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#define GPIO_LCD_VD4 GPIO_LCD_VD4_1
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#define GPIO_LCD_VD5 GPIO_LCD_VD5_1
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#define GPIO_LCD_VD6 GPIO_LCD_VD6_2
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#define GPIO_LCD_VD7 GPIO_LCD_VD7_2
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/* LCD G:
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*
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* VD8 --- Connected to P0[6]
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* VD9 --- Connected to P0[7]
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* VD10 --- Connected to P1[20]
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* VD11 --- Connected to P1[21]
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* VD12 --- Connected to P1[22]
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* VD13 --- Connected to P1[23]
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* VD14 --- Connected to P1[24]
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* VD15 --- Connected to P1[25]
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*/
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#define GPIO_LCD_VD8 GPIO_LCD_VD8_1
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#define GPIO_LCD_VD9 GPIO_LCD_VD9_1
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#define GPIO_LCD_VD10 GPIO_LCD_VD10_1
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#define GPIO_LCD_VD11 GPIO_LCD_VD11_1
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#define GPIO_LCD_VD12 GPIO_LCD_VD12_1
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#define GPIO_LCD_VD13 GPIO_LCD_VD13_1
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#define GPIO_LCD_VD14 GPIO_LCD_VD14_1
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#define GPIO_LCD_VD15 GPIO_LCD_VD15_1
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/* LCD B:
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*
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* VD16 --- Connected to P0[8]
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* VD17 --- Connected to P0[9]
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* VD18 --- Connected to P2[12]
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* VD19 --- Connected to P2[13]
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* VD20 --- Connected to P1[26]
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* VD21 --- Connected to P1[27]
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* VD22 --- Connected to P1[28]
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* VD23 --- Connected to P1[29]
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*
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* DCLK --- Connected to P2[2]
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* LP --- Connected to P2[5]
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* FP --- Connected to P2[3]
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* ENAB_M --- Connected to P2[4]
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* PWR --- Connected to P2[0]
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*/
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/* XPT2046 Touchscreen:
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*
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/* -------------- -------------------- ------------ --------------------------------
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* XTPT2046 Module Module
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* Signal Connector Connector
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* -------------- -------------------- ------------ ---------------------------------
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* Pin 11 PENIRQ\ PENIRQ (pulled high) PORT3 Pin 1 P2.15 PENIRQ
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* Pin 12 DOUT MISO PORT3 Pin 4 P1.18 MISO1 (Also USB HOST UP LED)
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* Pin 13 BUSY BUSY (pulled high) PORT3 Pin 9 P2.14 BUSY
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* Pin 14 DIN MOSI PORT3 Pin 3 P0.13 MOSI1 (Also USB Device up LED and SD CD pin)
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* Pin 15 CS\ SSEL (pulled high) PORT3 Pin 6 P1.8 GPIO (Also RMII_CRS_DV)
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* Pin 16 DCLK SCK PORT3 Pin 5 P1.19 SCK1
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* -------------- -------------------- ------------ ---------------------------------
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*/
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#define GPIO_SSP1_MISO GPIO_SSP1_MISO_3
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#define GPIO_SSP1_MOSI GPIO_SSP1_MOSI_2
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#define GPIO_SSP1_SCK GPIO_SSP1_SCK_2
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#endif
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#endif /* __CONFIG_LPC4088_QUICKSTART_INCLUDE_BOARD_H */
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