104 lines
2.9 KiB
ArmAsm
104 lines
2.9 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/sim/arch_setjmp_arm.S
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Nickolay Semyonov (RPI) <snob@wolpike.com>
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*
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* Extracted from the MUSL C-library. The MUSL C library has a compatible
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* MIT license and is released here under the NuttX 3-clause BSD license:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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.syntax unified
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.global setjmp
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.type setjmp,%function
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setjmp:
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mov ip,r0
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stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp}
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mov r2,sp
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stmia ip!,{r2,lr}
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mov r0,#0
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#if 0
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adr r1,1f
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ldr r2,1f
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ldr r1,[r1,r2]
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tst r1,#0x260
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beq 3f
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tst r1,#0x20
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beq 2f
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stc p2, cr4, [ip], #48
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2: tst r1,#0x40
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beq 2f
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.fpu vfp
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vstmia ip!, {d8-d15}
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.fpu softvfp
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.eabi_attribute 10, 0
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.eabi_attribute 27, 0
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2: tst r1,#0x200
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beq 3f
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stcl p1, cr10, [ip], #8
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stcl p1, cr11, [ip], #8
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stcl p1, cr12, [ip], #8
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stcl p1, cr13, [ip], #8
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stcl p1, cr14, [ip], #8
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stcl p1, cr15, [ip], #8
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#endif
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3: bx lr
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.syntax unified
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.global longjmp
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.type longjmp,%function
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longjmp:
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mov ip,r0
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movs r0,r1
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moveq r0,#1
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ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp}
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ldmia ip!, {r2,lr}
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mov sp,r2
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#if 0
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.fpu vfp
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vldmia ip!, {d8-d15}
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.fpu softvfp
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.eabi_attribute 10, 0
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.eabi_attribute 27, 0
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2: tst r1,#0x200
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beq 3f
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ldcl p1, cr10, [ip], #8
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ldcl p1, cr11, [ip], #8
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ldcl p1, cr12, [ip], #8
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ldcl p1, cr13, [ip], #8
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ldcl p1, cr14, [ip], #8
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ldcl p1, cr15, [ip], #8
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#endif
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3: bx lr
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