191 lines
6.3 KiB
C
191 lines
6.3 KiB
C
/****************************************************************************
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* arch/arm/src/lpc54xx/lpc54_dma.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC54XX_LP54_DMA_H
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#define __ARCH_ARM_SRC_LPC54XX_LP54_DMA_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/lpc54_dma.h"
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#ifdef CONFIG_LPC54_DMA
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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typedef void (*dma_callback_t)(int ch, void *arg, int result);
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/* The following is used for sampling DMA registers when
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* CONFIG DEBUG_DMA is selected
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*/
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#ifdef CONFIG_DEBUG_DMA
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struct lpc54_dmaglobalregs_s
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{
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/* Global Registers */
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uint32_t ctrl; /* DMA control */
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uint32_t intstat; /* DMA Interrupt status */
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uint32_t srambase; /* SRAM address of the channel configuration table */
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uint32_t enableset0; /* DMA Channel enable read and set */
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uint32_t active0; /* DMA Channel active status */
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uint32_t busy0; /* DMA Channel busy status */
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uint32_t errint0; /* DMA Error interrupt status */
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uint32_t intenset0; /* DMA Interrupt enable read and set */
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uint32_t inta0; /* DMA Interrupt A status */
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uint32_t intb0; /* DMA Interrupt B status */
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};
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struct lpc54_dmachanregs_s
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{
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/* Channel Registers */
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uint32_t cfg; /* DMA Configuration register */
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uint32_t ctlstat; /* DMA Control and status register */
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uint32_t xfercfg; /* DMA Transfer configuration register */
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};
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struct lpc54_dmaregs_s
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{
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/* Global Registers */
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struct lpc54_dmaglobalregs_s gbl;
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/* Channel Registers */
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struct lpc54_dmachanregs_s ch;
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};
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: lpc54_dma_setup
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*
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* Description:
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* Configure DMA for one transfer.
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*
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* Input Parameters:
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* ch - DMA channel number
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* cfg - The content of the DMA channel configuration register. See
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* peripheral channel definitions in chip/lpc54_dma.h. The
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* caller must provide all fields: PERIPHREQEN, TRIGPOL,
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* TRIGTYPE, TRIGBURST, BURSTPOWER, SRCBURSTWRAP, DSTBURSTWRAP,
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* and CHPRIORITY.
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* xfrcfg - The content of the DMA channel configuration register. See
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* peripheral channel definitions in chip/lpc54_dma.h. The
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* caller must provide all fields: WIDTH, SRCINC, and DSTINC.\
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* All of fields are managed by the DMA driver
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* trigsrc - See input mux DMA trigger ITRIG_INMUX_* definitions in
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* chip/lpc54_inputmux.h.
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* srcaddr - Source address of the DMA transfer
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* dstaddr - Destination address of the DMA transfer
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* nbytes - Number of bytes to transfer
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*
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****************************************************************************/
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int lpc54_dma_setup(int ch, uint32_t cfg, uint32_t xfrcfg, uint8_t trigsrc,
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uintptr_t srcaddr, uintptr_t dstaddr, size_t nbytes);
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/****************************************************************************
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* Name: lpc54_dmastart
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*
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* Description:
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* Start the DMA transfer
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*
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****************************************************************************/
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int lpc54_dmastart(int ch, dma_callback_t callback, void *arg);
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/****************************************************************************
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* Name: lpc54_dmastop
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*
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* Description:
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* Cancel the DMA. After lpc54_dmastop() is called, the DMA channel is
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* reset and lpc54_dmasetup() must be called before lpc54_dmastart() can be
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* called again
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*
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****************************************************************************/
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void lpc54_dmastop(int ch);
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/****************************************************************************
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* Name: lpc54_dmasample
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*
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* Description:
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* Sample DMA register contents
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_DMA
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void lpc54_dmasample(int ch, struct lpc54_dmaregs_s *regs);
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#else
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# define lpc54_dmasample(handle,regs)
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#endif
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/****************************************************************************
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* Name: lpc54_dmadump
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*
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* Description:
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* Dump previously sampled DMA register contents
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_DMA
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void lpc54_dmadump(int ch, const struct lpc54_dmaregs_s *regs,
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const char *msg);
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#else
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# define lpc54_dmadump(handle,regs,msg)
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_LPC54_DMA */
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#endif /* __ARCH_ARM_SRC_LPC54XX_LP54_DMA_H */
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