68951e8d72
* Remove multiple newlines at the end of files * Remove the whitespace from the end of lines
906 lines
18 KiB
Plaintext
906 lines
18 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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comment "Atmel SAMD/L Configuration Options"
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choice
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prompt "Atmel SAMD/L Chip Selection"
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default ARCH_CHIP_SAMD20J18 if ARCH_CHIP_SAMD2X
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default ARCH_CHIP_SAMD21J18A if ARCH_CHIP_SAML2X
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depends on ARCH_CHIP_SAMD2X || ARCH_CHIP_SAML2X
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config ARCH_CHIP_SAMD20E14
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bool "SAMD20E14"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20E
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---help---
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Flash 16KB SRAM 2KB
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config ARCH_CHIP_SAMD20E15
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bool "SAMD20E15"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20E
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAMD20E16
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bool "SAMD20E16"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20E
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAMD20E17
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bool "SAMD20E17"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20E
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAMD20E18
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bool "SAMD20E18"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20E
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAMD20G14
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bool "SAMD20G14"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20G
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---help---
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Flash 16KB SRAM 2KB
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config ARCH_CHIP_SAMD20G15
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bool "SAMD20G15"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20G
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAMD20G16
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bool "SAMD20G16"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20G
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAMD20G17
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bool "SAMD20G17"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20G
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAMD20G18
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bool "SAMD20G18"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20G
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAMD20J14
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bool "SAMD20J14"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20J
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---help---
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Flash 16KB SRAM 2KB
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config ARCH_CHIP_SAMD20J15
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bool "SAMD20J15"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20J
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAMD20J16
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bool "SAMD20J16"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20J
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAMD20J17
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bool "SAMD20J17"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20J
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAMD20J18
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bool "SAMD20J18"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD20
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select ARCH_FAMILY_SAMD20J
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAMD21E15A
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bool "SAMD21E15A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAMD21E15B
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bool "SAMD21E15B"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 32KB SRAM 4KB RWW FLASH 1KB
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config ARCH_CHIP_SAMD21E16A
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bool "SAMD21E16A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAMD21E16B
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bool "SAMD21E16B"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 64KB SRAM 8KB RWW FLASH 2KB
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config ARCH_CHIP_SAMD21E17A
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bool "SAMD21E17A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAMD21E18A
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bool "SAMD21E18A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAMD21G15A
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bool "SAMD21G15A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21G
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAMD21G15B
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bool "SAMD21G15B"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21G
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---help---
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Flash 32KB SRAM 4KB RWW FLASH 1KB
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config ARCH_CHIP_SAMD21G16A
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bool "SAMD21G16A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21G
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAMD21G16B
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bool "SAMD21G16B"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 64KB SRAM 8KB RWW FLASH 2KB
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config ARCH_CHIP_SAMD21G17A
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bool "SAMD21G17A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21G
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAMD21G18A
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bool "SAMD21G18A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21G
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAMD21J15A
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bool "SAMD21J15A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21J
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAMD21J15B
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bool "SAMD21J15B"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21J
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---help---
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Flash 32KB SRAM 4KB RWW FLASH 1KB
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config ARCH_CHIP_SAMD21J16A
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bool "SAMD21J16A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21J
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAMD21J16B
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bool "SAMD21J16B"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21J
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---help---
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Flash 64KB SRAM 8KB RWW FLASH 2KB
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config ARCH_CHIP_SAMD21J17A
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bool "SAMD21J17A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21E
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAMD21J18A
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bool "SAMD21J18A"
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depends on ARCH_CHIP_SAMD2X
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select ARCH_FAMILY_SAMD21
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select ARCH_FAMILY_SAMD21J
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAML21E15
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bool "SAML21E15"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21E
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---help---
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Flash 32KB SRAM 4KB
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config ARCH_CHIP_SAML21E16
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bool "SAML21E16"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21E
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---help---
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Flash 64KB SRAM 8KB
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config ARCH_CHIP_SAML21E17
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bool "SAML21E17"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21E
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAML21E18
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bool "SAML21E18"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21E
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAML21G16
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bool "SAML21G16"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21G
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---help---
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Flash 64KB SRAM 4KB
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config ARCH_CHIP_SAML21G17
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bool "SAML21G17"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21G
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAML21G18
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bool "SAML21G18"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21G
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---help---
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Flash 256KB SRAM 32KB
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config ARCH_CHIP_SAML21J16
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bool "SAML21J16"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21J
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---help---
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Flash 64KB SRAM 4KB
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config ARCH_CHIP_SAML21J17
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bool "SAML21J17"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21J
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---help---
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Flash 128KB SRAM 16KB
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config ARCH_CHIP_SAML21J18
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bool "SAML21J18"
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depends on ARCH_CHIP_SAML2X
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select ARCH_FAMILY_SAML21
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select ARCH_FAMILY_SAML21J
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---help---
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Flash 256KB SRAM 32KB
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endchoice
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config ARCH_FAMILY_SAMD20
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bool
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default n
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select SAMD2L2_HAVE_TC2
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select SAMD2L2_HAVE_TC3
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select SAMD2L2_HAVE_TC5
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config ARCH_FAMILY_SAMD20E
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bool
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default n
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config ARCH_FAMILY_SAMD20G
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bool
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default n
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select SAMD2L2_HAVE_SERCOM4
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select SAMD2L2_HAVE_SERCOM5
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config ARCH_FAMILY_SAMD20J
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bool
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default n
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select SAMD2L2_HAVE_SERCOM4
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select SAMD2L2_HAVE_SERCOM5
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select SAMD2L2_HAVE_TC6
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select SAMD2L2_HAVE_TC7
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config ARCH_FAMILY_SAMD21
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bool
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default n
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select SAMD2L2_HAVE_DMAC
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select SAMD2L2_HAVE_USB
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config ARCH_FAMILY_SAMD21E
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bool
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default n
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config ARCH_FAMILY_SAMD21G
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bool
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default n
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select SAMD2L2_HAVE_SERCOM4
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select SAMD2L2_HAVE_SERCOM5
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config ARCH_FAMILY_SAMD21J
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bool
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default n
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select SAMD2L2_HAVE_SERCOM4
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select SAMD2L2_HAVE_SERCOM5
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select SAMD2L2_HAVE_TC2
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select SAMD2L2_HAVE_TC3
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select SAMD2L2_HAVE_TC5
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config ARCH_FAMILY_SAML21
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bool
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default n
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select SAMD2L2_HAVE_DMAC
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select SAMD2L2_HAVE_USB
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config ARCH_FAMILY_SAML21E
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bool
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default n
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config ARCH_FAMILY_SAML21G
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bool
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default n
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select SAMD2L2_HAVE_SERCOM4
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select SAMD2L2_HAVE_SERCOM5
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config ARCH_FAMILY_SAML21J
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bool
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default n
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select SAMD2L2_HAVE_SERCOM4
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select SAMD2L2_HAVE_SERCOM5
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select SAMD2L2_HAVE_TC2
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select SAMD2L2_HAVE_TC3
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select SAMD2L2_HAVE_TC5
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menu "SAMD/L Peripheral Support"
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config SAMD2L2_HAVE_DMAC
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bool
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default n
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config SAMD2L2_HAVE_SERCOM4
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bool
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default n
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config SAMD2L2_HAVE_SERCOM5
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bool
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default n
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config SAMD2L2_HAVE_TC5
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bool
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default n
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config SAMD2L2_HAVE_TC2
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bool
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default n
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config SAMD2L2_HAVE_TC3
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bool
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default n
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config SAMD2L2_HAVE_TC6
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bool
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default n
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config SAMD2L2_HAVE_TC7
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bool
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default n
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config SAMD2L2_HAVE_USB
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bool
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default n
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config SAMD2L2_AC
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bool "Analog Comparator"
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default n
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config SAMD2L2_ADC
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bool "Analog-to-Digital Converter"
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default n
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config SAMD2L2_DAC
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bool "Digital-to-Analog Converter"
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default n
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config SAMD2L2_DMAC
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bool "DMA Controller"
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default n
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select ARCH_DMA
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depends on SAMD2L2_HAVE_DMAC && EXPERIMENTAL
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config SAMD2L2_EVSYS
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bool "Event System"
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default n
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config SAMD2L2_NVMCTRL
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bool "Non-Volatile Memory Controller"
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default n
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config SAMD2L2_PTC
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bool "Peripheral Touch Controller"
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default n
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config SAMD2L2_RTC
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bool "Real Time Counter"
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default n
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config SAMD2L2_SERCOM0
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bool "Serial Communication Interface 0"
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default n
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config SAMD2L2_SERCOM1
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bool "Serial Communication Interface 1"
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default n
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config SAMD2L2_SERCOM2
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bool "Serial Communication Interface 2"
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default n
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config SAMD2L2_SERCOM3
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bool "Serial Communication Interface 3"
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default n
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config SAMD2L2_SERCOM4
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bool "Serial Communication Interface 4"
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default n
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depends on SAMD2L2_HAVE_SERCOM4
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config SAMD2L2_SERCOM5
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bool "Serial Communication Interface 5"
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default n
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depends on SAMD2L2_HAVE_SERCOM5
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config SAMD2L2_TC0
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bool "Timer/Counter 0"
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default n
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config SAMD2L2_TC1
|
|
bool "Timer/Counter 1"
|
|
default n
|
|
|
|
config SAMD2L2_TC2
|
|
bool "Timer/Counter 2"
|
|
default n
|
|
depends on SAMD2L2_HAVE_TC2
|
|
|
|
config SAMD2L2_TC3
|
|
bool "Timer/Counter 3"
|
|
default n
|
|
depends on SAMD2L2_HAVE_TC3
|
|
|
|
config SAMD2L2_TC4
|
|
bool "Timer/Counter 4"
|
|
default n
|
|
|
|
config SAMD2L2_TC5
|
|
bool "Timer/Counter 5"
|
|
default n
|
|
depends on SAMD2L2_HAVE_TC5
|
|
|
|
config SAMD2L2_TC6
|
|
bool "Timer/Counter 6"
|
|
default n
|
|
depends on SAMD2L2_HAVE_TC6
|
|
|
|
config SAMD2L2_TC7
|
|
bool "Timer/Counter 7"
|
|
default n
|
|
depends on SAMD2L2_HAVE_TC7
|
|
|
|
config SAMD2L2_USB
|
|
bool "USB"
|
|
default n
|
|
depends on SAMD2L2_HAVE_USB
|
|
|
|
config SAMD2L2_EIC
|
|
bool "External Interrupt Controller"
|
|
default n
|
|
|
|
config SAMD2L2_WDT
|
|
bool "Watchdog Timer"
|
|
default n
|
|
|
|
endmenu
|
|
|
|
config SAMD2L2_DMAC_NDESC
|
|
int "Number of additional DMA Descriptors"
|
|
default 0
|
|
depends on SAMD2L2_DMAC
|
|
---help---
|
|
This provides the number of additional DMA descriptors that can be
|
|
use to support multi-linked DMA transfers. A minimum of 16
|
|
descriptors will always be allocated (16 for the base descriptor which
|
|
overlap the writeback descriptors). If this value is set to zero,
|
|
then only single block DMA transfers can be supported.
|
|
|
|
Each additional DMA descriptor will require 16-bytes for LPRAM
|
|
memory.
|
|
|
|
choice
|
|
prompt "SERCOM0 mode"
|
|
default SAMD2L2_SERCOM0_ISUSART
|
|
depends on SAMD2L2_SERCOM0
|
|
|
|
config SAMD2L2_SERCOM0_ISI2C
|
|
bool "I2C"
|
|
select I2C
|
|
select SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_SERCOM0_ISSPI
|
|
bool "SPI"
|
|
select SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SERCOM0_ISUSART
|
|
bool "USART"
|
|
select USART0_SERIALDRIVER
|
|
|
|
endchoice
|
|
|
|
if USART0_SERIALDRIVER
|
|
|
|
config USART0_RS485MODE
|
|
bool "RS-485 on USART0"
|
|
default n
|
|
---help---
|
|
Enable RS-485 interface on USART0. Your board config will have to
|
|
provide GPIO_USART0_RS485_DIR pin definition. Currently it cannot be
|
|
used with USART0_RXDMA.
|
|
|
|
config USART0_RS485_DIR_POLARITY
|
|
int "USART0 RS-485 DIR pin polarity"
|
|
default 1
|
|
range 0 1
|
|
depends on USART0_RS485MODE
|
|
---help---
|
|
Polarity of DIR pin for RS-485 on USART0. Set to state on DIR pin which
|
|
enables TX (0 - low / nTXEN, 1 - high / TXEN).
|
|
|
|
endif # USART0_SERIALDRIVER
|
|
|
|
choice
|
|
prompt "SERCOM1 mode"
|
|
default SAMD2L2_SERCOM1_ISUSART
|
|
depends on SAMD2L2_SERCOM1
|
|
|
|
config SAMD2L2_SERCOM1_ISI2C
|
|
bool "I2C"
|
|
select I2C
|
|
select SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_SERCOM1_ISSPI
|
|
bool "SPI"
|
|
select SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SERCOM1_ISUSART
|
|
bool "USART"
|
|
select USART1_SERIALDRIVER
|
|
|
|
endchoice
|
|
|
|
if USART1_SERIALDRIVER
|
|
|
|
config USART1_RS485MODE
|
|
bool "RS-485 on USART1"
|
|
default n
|
|
---help---
|
|
Enable RS-485 interface on USART1. Your board config will have to
|
|
provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
|
|
used with USART1_RXDMA.
|
|
|
|
config USART1_RS485_DIR_POLARITY
|
|
int "USART1 RS-485 DIR pin polarity"
|
|
default 1
|
|
range 0 1
|
|
depends on USART1_RS485MODE
|
|
---help---
|
|
Polarity of DIR pin for RS-485 on USART1. Set to state on DIR pin which
|
|
enables TX (0 - low / nTXEN, 1 - high / TXEN).
|
|
|
|
endif # USART1_SERIALDRIVER
|
|
|
|
choice
|
|
prompt "SERCOM2 mode"
|
|
default SAMD2L2_SERCOM2_ISUSART
|
|
depends on SAMD2L2_SERCOM2
|
|
|
|
config SAMD2L2_SERCOM2_ISI2C
|
|
bool "I2C"
|
|
select I2C
|
|
select SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_SERCOM2_ISSPI
|
|
bool "SPI"
|
|
select SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SERCOM2_ISUSART
|
|
bool "USART"
|
|
select USART2_SERIALDRIVER
|
|
|
|
endchoice
|
|
|
|
if USART2_SERIALDRIVER
|
|
|
|
config USART2_RS485MODE
|
|
bool "RS-485 on USART2"
|
|
default n
|
|
---help---
|
|
Enable RS-485 interface on USART2. Your board config will have to
|
|
provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
|
|
used with USART2_RXDMA.
|
|
|
|
config USART2_RS485_DIR_POLARITY
|
|
int "USART2 RS-485 DIR pin polarity"
|
|
default 1
|
|
range 0 1
|
|
depends on USART2_RS485MODE
|
|
---help---
|
|
Polarity of DIR pin for RS-485 on USART2. Set to state on DIR pin which
|
|
enables TX (0 - low / nTXEN, 1 - high / TXEN).
|
|
|
|
endif # USART2_SERIALDRIVER
|
|
|
|
choice
|
|
prompt "SERCOM3 mode"
|
|
default SAMD2L2_SERCOM3_ISUSART
|
|
depends on SAMD2L2_SERCOM3
|
|
|
|
config SAMD2L2_SERCOM3_ISI2C
|
|
bool "I2C"
|
|
select I2C
|
|
select SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_SERCOM3_ISSPI
|
|
bool "SPI"
|
|
select SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SERCOM3_ISUSART
|
|
bool "USART"
|
|
select USART3_SERIALDRIVER
|
|
|
|
endchoice
|
|
|
|
if USART3_SERIALDRIVER
|
|
|
|
config USART3_RS485MODE
|
|
bool "RS-485 on USART3"
|
|
default n
|
|
---help---
|
|
Enable RS-485 interface on USART3. Your board config will have to
|
|
provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
|
|
used with USART3_RXDMA.
|
|
|
|
config USART3_RS485_DIR_POLARITY
|
|
int "USART3 RS-485 DIR pin polarity"
|
|
default 1
|
|
range 0 1
|
|
depends on USART3_RS485MODE
|
|
---help---
|
|
Polarity of DIR pin for RS-485 on USART3. Set to state on DIR pin which
|
|
enables TX (0 - low / nTXEN, 1 - high / TXEN).
|
|
|
|
endif # USART3_SERIALDRIVER
|
|
|
|
choice
|
|
prompt "SERCOM4 mode"
|
|
default SAMD2L2_SERCOM4_ISUSART
|
|
depends on SAMD2L2_SERCOM4
|
|
|
|
config SAMD2L2_SERCOM4_ISI2C
|
|
bool "I2C"
|
|
select I2C
|
|
select SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_SERCOM4_ISSPI
|
|
bool "SPI"
|
|
select SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SERCOM4_ISUSART
|
|
bool "USART"
|
|
select USART4_SERIALDRIVER
|
|
|
|
endchoice
|
|
|
|
if USART4_SERIALDRIVER
|
|
|
|
config USART4_RS485MODE
|
|
bool "RS-485 on USART4"
|
|
default n
|
|
---help---
|
|
Enable RS-485 interface on USART4. Your board config will have to
|
|
provide GPIO_USART4_RS485_DIR pin definition. Currently it cannot be
|
|
used with USART4_RXDMA.
|
|
|
|
config USART4_RS485_DIR_POLARITY
|
|
int "USART4 RS-485 DIR pin polarity"
|
|
default 1
|
|
range 0 1
|
|
depends on USART4_RS485MODE
|
|
---help---
|
|
Polarity of DIR pin for RS-485 on USART4. Set to state on DIR pin which
|
|
enables TX (0 - low / nTXEN, 1 - high / TXEN).
|
|
|
|
endif # USART4_SERIALDRIVER
|
|
|
|
choice
|
|
prompt "SERCOM5 mode"
|
|
default SAMD2L2_SERCOM5_ISUSART
|
|
depends on SAMD2L2_SERCOM5
|
|
|
|
config SAMD2L2_SERCOM5_ISI2C
|
|
bool "I2C"
|
|
select I2C
|
|
select SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_SERCOM5_ISSPI
|
|
bool "SPI"
|
|
select SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SERCOM5_ISUSART
|
|
bool "USART"
|
|
select USART5_SERIALDRIVER
|
|
|
|
endchoice
|
|
|
|
if USART5_SERIALDRIVER
|
|
|
|
config USART5_RS485MODE
|
|
bool "RS-485 on USART5"
|
|
default n
|
|
---help---
|
|
Enable RS-485 interface on USART5. Your board config will have to
|
|
provide GPIO_USART5_RS485_DIR pin definition. Currently it cannot be
|
|
used with USART5_RXDMA.
|
|
|
|
config USART5_RS485_DIR_POLARITY
|
|
int "USART5 RS-485 DIR pin polarity"
|
|
default 1
|
|
range 0 1
|
|
depends on USART5_RS485MODE
|
|
---help---
|
|
Polarity of DIR pin for RS-485 on USART5. Set to state on DIR pin which
|
|
enables TX (0 - low / nTXEN, 1 - high / TXEN).
|
|
|
|
endif # USART5_SERIALDRIVER
|
|
|
|
config SAMD2L2_HAVE_SPI
|
|
bool
|
|
select SPI
|
|
|
|
menu "SPI options"
|
|
depends on SAMD2L2_HAVE_SPI
|
|
|
|
config SAMD2L2_SPI_DMA
|
|
bool "SPI DMA"
|
|
default n
|
|
depends on SAMD2L2_DMAC && EXPERIMENTAL
|
|
---help---
|
|
Use DMA for SPI SERCOM peripherals.
|
|
|
|
config SAMD2L2_SPI_REGDEBUG
|
|
bool "SPI register-Level Debug"
|
|
default n
|
|
depends on DEBUG_SPI_INFO
|
|
---help---
|
|
Enable very low-level register access debug. Depends on DEBUG_SPI.
|
|
|
|
endmenu # SPI options
|
|
|
|
config SAMD2L2_HAVE_I2C
|
|
bool
|
|
select I2C
|
|
|
|
menu "I2C options"
|
|
depends on SAMD2L2_HAVE_I2C
|
|
|
|
config SAMD2L2_I2C_REGDEBUG
|
|
bool "I2C register-Level Debug"
|
|
default n
|
|
depends on DEBUG_I2C_INFO
|
|
---help---
|
|
Enable very low-level register access debug. Depends on DEBUG_I2C.
|
|
|
|
endmenu # I2C options
|
|
|
|
menu "USB options"
|
|
depends on SAMD2L2_HAVE_USB
|
|
|
|
config SAMD2L2_USB_ENABLE_PPEP
|
|
bool "Enable Ping-Pong Endpoints"
|
|
default n
|
|
---help---
|
|
To maximize throughput, an endpoint can be configured for ping-pong
|
|
operation. When this is done the input and output endpoint with the same
|
|
address are used in the same direction. The CPU or DMA Controller can
|
|
then read/write one data buffer while the USB module writes/reads from
|
|
the other buffer. This gives double buffered communication.
|
|
|
|
config SAMD2L2_USB_REGDEBUG
|
|
bool "USB register-Level Debug"
|
|
default n
|
|
depends on DEBUG_USB_INFO
|
|
---help---
|
|
Enable very low-level register access debug. Depends on
|
|
CONFIG_DEBUG_USB_INFO.
|
|
|
|
endmenu # USB options
|