Maciej Wójcik c719a32a40 add tim8 to stm32f103v pinmap

2016-10-19 16:34:07 +02:00

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a1x

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arm

Replaces last three commits. Does the same thing, but does it in a way that does not change the usage model.

2016-06-21 05:26:08 -06:00

armv6-m

Replaces last three commits. Does the same thing, but does it in a way that does not change the usage model.

2016-06-21 05:26:08 -06:00

armv7-a

Replaces last three commits. Does the same thing, but does it in a way that does not change the usage model.

2016-06-21 05:26:08 -06:00

armv7-m

Replaces last three commits. Does the same thing, but does it in a way that does not change the usage model.

2016-06-21 05:26:08 -06:00

armv7-r

Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized.

2016-07-23 10:36:06 -06:00

c5471

Fix names of pre-processor variables used in header file idempotence

2016-08-06 18:48:45 -06:00

calypso

Fix names of pre-processor variables used in header file idempotence

2016-08-06 18:48:45 -06:00

common

Move driver related prototypes out of include/nuttx/fs/fs.h and into new include/drivers/drivers.h

2016-07-20 13:15:37 -06:00

dm320

Fix names of pre-processor variables used in header file idempotence

2016-08-06 18:48:45 -06:00

efm32

Make bit-order SPI H/W feature configurable for better error detection

2016-08-08 11:54:13 -06:00

imx1

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imx6

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kinetis

Kinetis:BugFix:i2c driver offset swapped for value in kinetis_i2c_putreg

2016-10-18 12:00:01 -10:00

kl

Merged in JordanMacIntyre/nuttx/PWM_driver (pull request #106)

2016-07-25 14:59:45 -06:00

lpc11xx

Rename LP11xx version of CONFIG_GPIO_IRQ to CONFIG_LPC11_GPIOIRQ

2016-07-22 14:23:31 -06:00

lpc17xx

Rename LP17xx version of CONFIG_GPIO_IRQ to CONFIG_LPC17_GPIOIRQ

2016-07-22 14:18:30 -06:00

lpc31xx

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lpc43xx

There are some small problems in LPC43xx RS485 mode configuration. In particular: 1. UART0,2,3 do not have DTR pins (different from UART1), so, Kconfig needs to be adjusted. 2. lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't enable pin output for UART0,2,3. 3. should be option to reverse DIR control pin output polarity. 4. lpc43xx/chip/lpc43_uart.h doesn't have USART3 definitions. NOTE: I didn't modified and didn't tested USART1, as it has different hardware. From Vytautas Lukenskas.

2016-09-30 08:51:49 -06:00

lpc214x

Fix names of pre-processor variables used in header file idempotence

2016-08-06 18:48:45 -06:00

lpc2378

Fix names of pre-processor variables used in header file idempotence

2016-08-06 18:48:45 -06:00

moxart

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nuc1xx

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sam34

SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7

2016-09-20 15:33:31 -06:00

sama5

SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7

2016-09-20 15:33:31 -06:00

samdl

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samv7

SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7

2016-09-20 15:33:31 -06:00

stm32

add tim8 to stm32f103v pinmap

2016-10-19 16:34:07 +02:00

stm32f7

Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII

2016-09-22 10:05:45 +02:00

stm32l4

Trivial stylistic changes from review of last PR

2016-10-14 11:12:49 -06:00

str71x

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tiva

Add a new ioctl command (set MAXPOS) for tiva QEI

2016-09-26 18:10:06 +08:00

tms570

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.gitignore

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Makefile

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