Inochi Amaoto 0ddcbe62ec arch/risc-v: does not clear IPI address in S mode
According to the riscv-aclint doc, writing 0 to SSWI address
has no effect. Remove this unnecessary write for S mode.

Link: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-07-18 22:59:29 +08:00
..
2024-07-15 02:29:30 +08:00
2024-07-15 02:29:30 +08:00
2024-07-15 02:29:30 +08:00