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addrenv.h
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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arm_addrenv_kstack.c
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Initial integration of kernel stack (does not work)
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2014-09-14 11:19:34 -06:00 |
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arm_addrenv_shm.c
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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arm_addrenv_ustack.c
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Add logic necessary to handler remapping of shared memory on contex switches
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2014-09-23 13:19:30 -06:00 |
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arm_addrenv_utils.c
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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arm_addrenv.c
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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arm_allocpage.c
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Make some spacing comply better with coding standard
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2015-10-06 16:23:32 -06:00 |
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arm_assert.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_blocktask.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_checkmapping.c
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Improve Cortex-A5 context switching so that a little less copying is done
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2013-07-24 07:47:51 -06:00 |
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arm_coherent_dcache.c
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ARMv7-A: Cosmetic changes
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2015-12-14 08:42:39 -06:00 |
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arm_copyarmstate.c
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ARMv7-A/M: Cosmetic changes
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2015-12-14 11:56:39 -06:00 |
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arm_copyfullstate.c
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Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
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2014-08-08 18:39:28 -06:00 |
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arm_cpuindex.c
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ARM: Remove some obsolete and incorrect conditional compilation
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2016-03-11 12:42:58 -06:00 |
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arm_dataabort.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_doirq.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_elf.c
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Make some spacing comply better with coding standard
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2015-10-06 16:23:32 -06:00 |
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arm_fpuconfig.S
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Make some file section headers more consistent with standard
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2015-04-08 08:04:12 -06:00 |
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arm_fullcontextrestore.S
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Make some file section headers more consistent with standard
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2015-04-08 08:04:12 -06:00 |
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arm_gic.c
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i.MX6: Finish GIC initialization
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2016-03-12 11:38:16 -06:00 |
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arm_head.S
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TMS570 is big-endian
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2015-12-26 14:47:54 -06:00 |
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arm_initialstate.c
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All tasks, even user mode tasks, must start in supervisor mode until they get past the start-up trampoline
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2014-09-11 18:42:52 -06:00 |
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arm_l2cc_pl310.c
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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arm_memcpy.S
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ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit
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2015-12-16 09:03:14 -06:00 |
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arm_mmu.c
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Make some spacing comply better with coding standard
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2015-10-06 16:23:32 -06:00 |
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arm_pgalloc.c
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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arm_pghead.S
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ARMv7-A: Cosmetic changes
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2015-12-14 08:42:39 -06:00 |
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arm_pginitialize.c
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More ARMv7-A files that are just copies of the ARMv4/5 files for now
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2013-07-19 11:43:04 -06:00 |
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arm_physpgaddr.c
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Move some share-able logic from sama5/sam_pgalloc.c to armv7-a/arm_physpgaddr.c
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2014-09-16 13:29:43 -06:00 |
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arm_prefetchabort.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_releasepending.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_reprioritizertr.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_restorefpu.S
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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arm_savefpu.S
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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arm_saveusercontext.S
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Make some file section headers more consistent with standard
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2015-04-08 08:04:12 -06:00 |
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arm_schedulesigaction.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_sigdeliver.c
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Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
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2016-02-14 16:11:25 -06:00 |
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arm_signal_dispatch.c
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Move common/up_signal_dispatch.c to armv6-m, armv7-m, and armv7-a. The armv7-a version needs to be different to handle the case where we are dispatch kernel mode signals when running under a user mode group
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2014-09-16 13:35:29 -06:00 |
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arm_syscall.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_testset.S
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Add spinlock support for ARMv7-M architectures
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2016-02-09 13:44:22 -06:00 |
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arm_unblocktask.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_undefinedinsn.c
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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arm_va2pte.c
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Make some spacing comply better with coding standard
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2015-10-06 16:23:32 -06:00 |
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arm_vectoraddrexcptn.S
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Make some file section headers more consistent with standard
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2015-04-08 08:04:12 -06:00 |
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arm_vectors.S
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TMS570: Add a little more IRQ/FIQ logic
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2015-12-21 10:57:01 -06:00 |
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arm_vectortab.S
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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arm_vfork.S
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More trailing whilespace removal
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2014-04-13 16:22:22 -06:00 |
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arm_virtpgaddr.c
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Costmetic fixes to C coding style
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2015-10-05 17:13:53 -06:00 |
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arm.h
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ARMv7-A: Add GIC register definition header file
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2016-02-29 18:13:51 -06:00 |
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cache.h
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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cp15_cacheops.h
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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cp15_clean_dcache.S
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ARMv7-A: Update some co-processor register naming
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2015-12-14 13:04:03 -06:00 |
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cp15_coherent_dcache.S
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ARMv7-A: Update some co-processor register naming
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2015-12-14 13:04:03 -06:00 |
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cp15_flush_dcache.S
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ARMv7-A: Update some co-processor register naming
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2015-12-14 13:04:03 -06:00 |
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cp15_invalidate_dcache_all.S
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Make some file section headers more consistent with standard
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2015-04-08 08:04:12 -06:00 |
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cp15_invalidate_dcache.S
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ARMv7-A: Update some co-processor register naming
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2015-12-14 13:04:03 -06:00 |
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cp15.h
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ARMv7-A: Update some co-processor register naming
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2015-12-14 13:04:03 -06:00 |
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crt0.c
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ARMv7-A: Modify up_fullcontextrestore() for CONFIG_BUILD_KERNEL. It changed CPSR while in kernel. That will crash is the new CPSR is user mode while executing in kernel space. Fixed by adding a SYS_context_restore system call. There is an alternative, simpler modification to up_fullcontextrestore() that could have been done: It might have been possible to use the SPSR instead of the CPRSR and then do an exception return from up_fullcontextrestore(). That would be more efficient, but I never tried it.
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2014-09-12 08:04:27 -06:00 |
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fpu.h
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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gic.h
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i.MX6: Finish GIC initialization
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2016-03-12 11:38:16 -06:00 |
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gtm.h
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i.MX6: Add incomplete GPT header file
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2016-03-09 09:08:01 -06:00 |
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Kconfig
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i.MX6: Add a system timer based on the i.MX6 GPT
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2016-03-09 12:16:44 -06:00 |
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l2cc_pl310.h
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arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
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2014-07-26 16:50:08 -06:00 |
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l2cc.h
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ARMv7-A: Cosmetic changes
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2015-12-14 08:42:39 -06:00 |
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mmu.h
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ARMv7-A: Cosmetic changes
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2015-12-14 08:42:39 -06:00 |
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mpcore.h
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MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq()
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2016-03-10 08:37:34 -06:00 |
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pgalloc.h
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This completes the implementation of shared memory support
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2014-09-24 09:27:17 -06:00 |
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sctlr.h
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Implement Cortex-A9 up_cpu_index() using the MPIDR register. Thanks Alan.
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2016-03-10 14:02:58 -06:00 |
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svcall.h
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ARMv7-A/M: Cosmetic changes
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2015-12-14 11:56:39 -06:00 |
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Toolchain.defs
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WINTOOl should be selected only for Cygwin. MSYS and native should not have it.
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2016-01-09 16:34:33 -06:00 |
