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esp32
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xtensa/irq.h: Add a macro to convert to an IRQ from a peripheral ID.
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2021-08-18 10:49:58 -03:00 |
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esp32s2
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Fix dangling whitespace at the end of line
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2021-06-01 07:49:54 +02:00 |
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lx6
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arch: xtensa: Author Gregory Nutt: update licenses to Apache
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2021-04-02 03:14:31 -05:00 |
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lx7
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Add initial ESP32S2 Xtensa support
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2021-06-01 07:49:54 +02:00 |
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xtensa
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xtensa:coproc: fix XTENSA_CP_ALLSET error in some case
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2021-08-10 19:44:55 -07:00 |
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.gitignore
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arch.h
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arch: Rename xxx_getsp to up_getsp
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2021-06-09 10:20:02 -07:00 |
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elf.h
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xtensa: Implement a few relocations
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2020-03-16 07:54:49 -06:00 |
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inttypes.h
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xtensa inttypes.h: Remove PRI/SCN macros for fast and least types
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2020-11-05 18:49:22 -08:00 |
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irq.h
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arch:xtensa:include chip/irq.h instead of depend on chip config.
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2021-08-05 10:08:48 +02:00 |
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limits.h
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arch: xtensa: Author Gregory Nutt: update licenses to Apache
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2021-04-02 03:14:31 -05:00 |
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loadstore.h
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esp32: emulate byte access for module text
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2020-03-16 07:54:49 -06:00 |
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simcall.h
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xtensa: Implement simcall
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2020-03-12 09:03:31 -05:00 |
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spinlock.h
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arch&boards/xtensa: Fix some typos, references to STM/ARM code and
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2020-08-27 05:48:55 -07:00 |
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stdarg.h
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arch:xtensa: add arch stdarg.h include file for xtensa
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2021-08-09 17:58:25 -03:00 |
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syscall.h
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arch: xtensa: Author Gregory Nutt: update licenses to Apache
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2021-04-02 03:14:31 -05:00 |
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tls.h
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arch: Rename xxx_getsp to up_getsp
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2021-06-09 10:20:02 -07:00 |
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types.h
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arch: xtensa: Author Gregory Nutt: update licenses to Apache
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2021-04-02 03:14:31 -05:00 |
