135 lines
5.9 KiB
C
135 lines
5.9 KiB
C
/****************************************************************************************************
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* arch/arm/src/lpc2378/lpc23xx_scb.h
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*
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* Copyright (C) 2010 Rommel Marcelo. All rights reserved.
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* Author: Rommel Marcelo
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*
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* This file is part of the NuttX RTOS and based on the lpc2148 port:
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*
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* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC2378_LPC23XX_SCB_H
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#define __ARCH_ARM_SRC_LPC2378_LPC23XX_SCB_H
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/****************************************************************************************************
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* Included Files
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****************************************************************************************************/
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#include <chip.h>
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#include "lpc23xx_vic.h"
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/****************************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************************/
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#define scb_getreg(o) getreg32(LPC23XX_SCB_BASE + (o))
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#define scb_putreg(v,o) putreg32((v),LPC23XX_SCB_BASE + (o))
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/* Memory Accelerator Mode */
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#define MAMCR_OFF 0
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#define MAMCR_PART 1
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#define MAMCR_FULL 2
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/* Memory Mapping */
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#define MEMMAP2BBLK 0 /* Interrupt Vectors in Boot Block */
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#define MEMMAP2FLASH 1 /* Interrupt Vectors in FLASH */
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#define MEMMAP2SRAM 2 /* Interrupt Vectors in RAM */
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/* Register bit settings */
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/* PLL Control Register Bit Settings */
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#define PLLCON_PLLE (1 << 0) /* PLL Enable */
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#define PLLCON_PLLC (1 << 1) /* PLL Connect */
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/* PLL Configuration Register Bit Settings */
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#define PLLCFG_MSEL (0x0000ffff << 0) /* PLL Multiplier (minus 1) */
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#define PLLCFG_NSEL (0x000000ff << 16) /* PLL Divider */
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/* PLL Status Register Bit Settings */
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#define PLLSTAT_MSEL (0x7fff << 0) /* PLL Multiplier Readback */
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#define PLLSTAT_NSEL (0xff << 16) /* PLL Divider Readback */
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#define PLLSTAT_PLLE (1 << 24) /* PLL Enable Readback */
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#define PLLSTAT_PLLC (1 << 25) /* PLL Connect Readback */
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#define PLLSTAT_PLOCK (1 << 26) /* PLL Lock Status */
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/* PLL Feed Register values */
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#define PLLFEED1 0xaa
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#define PLLFEED2 0x55
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/* Peripheral Power Control (PCONP) Register 0xE01FC0C4 */
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#define PCTIM0 (1 << 1) /* Timer/Counter 0 */
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#define PCTIM1 (1 << 2) /* Timer/Counter 1 */
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#define PCUART0 (1 << 3) /* UART0 power/clock */
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#define PCUART1 (1 << 4) /* UART1 power/clock */
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#define PCPWM1 (1 << 5) /* Unused, always 0 */
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#define PWM1 (1 << 6) /* Pulse Width Modulation 1 */
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#define PCI2C0 (1 << 7) /* I2C0 interface */
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#define PCSPI (1 << 8) /* SPI */
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#define PCRTC (1 << 9) /* Real Time Clock*/
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#define PCSSP1 (1 << 10) /* SSP1 */
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#define PCEMC (1 << 11) /* External Memory Controller */
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#define PCAD (1 << 12) /* A/D converter (ADC) Note: Clear the PDN
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* bit in the AD0CR before clearing this bit,
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* and set this bit before setting PDN */
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#define PCAN1 (1 << 13) /* CAN Controller 1 */
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#define PCAN2 (1 << 14) /* CAN Controller 2 */
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#define PCI2C1 (1 << 19) /* The I2C1 interface power/clock control bit */
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#define PCSSP0 (1 << 21) /* The SSP0 interface power/clock control bit */
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#define PCTIM2 (1 << 22) /* Timer 2 */
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#define PCTIM3 (1 << 23) /* Timer 3 */
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#define PCUART2 (1 << 24) /* UART 2 */
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#define PCUART3 (1 << 25) /* UART 3 */
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#define PCI2C2 (1 << 26) /* I2C interface 2 */
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#define PCI2S (1 << 27) /* I2S interface */
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#define PCSDC (1 << 28) /* SD card interface */
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#define PCGPDMA (1 << 29) /* GP DMA function */
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#define PCENET (1 << 30) /* Ethernet block */
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#define PCUSB (1 << 31) /* USB interface */
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/****************************************************************************************************
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* Inline Functions
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****************************************************************************************************/
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/****************************************************************************************************
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* Global Function Prototypes
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****************************************************************************************************/
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#endif /* __ARCH_ARM_SRC_LPC2378_LPC23XX_SCB_H */
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