141 lines
5.9 KiB
C
141 lines
5.9 KiB
C
/************************************************************************************
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* arch/arm/include/stm32h7/chip.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* Simon Laube <simon@leitwert.ch>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_STM32H7_CHIP_H
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#define __ARCH_ARM_INCLUDE_STM32H7_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* STM32H7x3xx Differences between family members:
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*
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* ----------- ----------------
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*
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* PART PACKAGE
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* ----------- ----------------
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* STM32H7x3Zx LQFP144
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* ----------- ----------------
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*
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* Parts STM32H7xxxI have 2048Kb of FLASH
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*
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* The correct FLASH size will be set CONFIG_STM32H7_FLASH_CONFIG_x or overridden
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* with CONFIG_STM32H7_FLASH_OVERRIDE_x
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*/
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#if defined(CONFIG_ARCH_CHIP_STM32H743ZI)
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#else
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# error STM32 H7 chip not identified
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#endif
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/* Size SRAM */
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#if defined(CONFIG_STM32H7_STM32H7X3XX)
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/* Memory */
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# define STM32H7_SRAM_SIZE (512*1024) /* 512Kb SRAM on AXI bus Matrix (D1) */
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# define STM32H7_SRAM1_SIZE (128*1024) /* 128Kb SRAM1 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM2_SIZE (128*1024) /* 128Kb SRAM2 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM3_SIZE (32*1024) /* 32Kb SRAM3 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM123_SIZE (288*1024) /* 128Kb SRAM123 on AHB bus Matrix (D2) */
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# define STM32H7_SRAM4_SIZE (64*1024) /* 64Kb SRAM2 on AHB bus Matrix (D3) */
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# if defined(CONFIG_ARMV7M_HAVE_DTCM)
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# define STM32H7_DTCM_SRAM_SIZE (128*1024) /* 128Kb DTCM SRAM on TCM interface */
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# else
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# define STM32H7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */
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# endif
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# if defined(CONFIG_ARMV7M_HAVE_ITCM)
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# define STM32H7_ITCM_SRAM_SIZE (64*1024) /* 64b ITCM SRAM on TCM interface */
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# else
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# define STM32H7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */
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# endif
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/* Peripherals */
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# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
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# define STM32H7_NADC (3) /* (3) ADC1-3*/
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# define STM32H7_NDAC (2) /* (2) DAC1-2*/
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# define STM32H7_NCMP (2) /* (2) ultra-low power comparators */
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# define STM32H7_NPGA (2) /* (2) Operational amplifiers: OPAMP */
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# define STM32H7_NDFSDM (1) /* (1) digital filters for sigma delta modulator */
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# define STM32H7_NUSART (4) /* (4) USART1-3, 6 */
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# define STM32H7_NSPI (6) /* (6) SPI1-6 */
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# define STM32H7_NI2S (3) /* (3) I2S1-3 */
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# define STM32H7_NUART (4) /* (4) UART4-5, 7-8 */
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# define STM32H7_NI2C (4) /* (4) I2C1-4 */
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# define STM32H7_NSAI (4) /* (4) SAI1-4*/
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# define STM32H7_NCAN (2) /* (2) CAN1-2 */
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# define STM32H7_NSDIO (2) /* (2) SDIO */
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#else
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# error STM32 H7 chip Family not identified
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#endif
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/* TBD FPU Configuration */
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#if defined(CONFIG_ARCH_HAVE_FPU)
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#else
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#endif
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#if defined(CONFIG_ARCH_HAVE_DPFPU)
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#else
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#endif
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/* Diversification based on Family and package */
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// TODO:
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// #if defined(CONFIG_STM32F7_HAVE_FMC)
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// # define STM32F7_NFMC 1 /* Have FMC memory controller */
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// #else
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// # define STM32F7_NFMC 0 /* No FMC memory controller */
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// #endif
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/* NVIC priority levels *************************************************************/
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/* 16 Programmable interrupt levels */
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// TODO: check this
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#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
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#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
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#endif /* __ARCH_ARM_INCLUDE_STM32H7_CHIP_H */
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