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d32e9c38df
nuttx/boards/risc-v/k210/maix-bit
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Xiang Xiao d32e9c38df boards: Move the C/C++ search path to the common place 
so all boards support uClibc++/libc++ automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ibe6fafbec57f7acb26ea6188a3e9923ea82295c5
2020-07-13 15:11:12 -03:00
..
configs arch: Select 64bit elf base on the architecture characteristic 2020-05-31 21:38:32 -07:00
include boards/risc-v/k210/maix-bit: Add initial autoled support 2020-06-08 10:53:29 +09:00
kernel sched: Rename task_startup to nxtask_startup 2020-07-01 07:55:33 -06:00
scripts boards: Move the C/C++ search path to the common place 2020-07-13 15:11:12 -03:00
src boards/risc-v/k210/maix-bit: Add initial autoled support 2020-06-08 10:53:29 +09:00
Kconfig Squashed commit of the following: 2019-12-31 09:06:20 -06:00
README-qemu.txt boards: maix-bit: Update instructions for kostest 2020-04-22 13:45:56 +08:00
README.txt boards: maix-bit: Add descriptions on how to write nuttx.bin to SPI-Flash 2020-05-05 17:21:32 -07:00

README.txt 

1. Download and install toolchain and openocd-k210

  $ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz

2. Build openocd-k210

  $ git clone https://github.com/kendryte/openocd-kendryte
  $ cd openocd-kendryte
  $ ./bootstrap & ./configure & make

3. Configure and build NuttX

  $ mkdir ./nuttx; cd ./nuttx
  $ git clone https://bitbucket.org/nuttx/nuttx.git
  $ git clone https://bitbucket.org/nuttx/apps.git
  $ cd nuttx
  $ make distclean
  $ ./tools/configure.sh maix-bit:nsh
  $ make V=1

4. Download and run the nuttx from SRAM (not SPI-Flash)

  $ picocom -b 115200 /dev/ttyUSB0
  $ sudo ./src/openocd -s ./tcl -f ./tcl/kendryte.cfg -m 0
  $ riscv64-unknown-elf-gdb ./nuttx
  (gdb) target extended-remote :3333
  (gdb) load nuttx
  (gdb) c

5. Write nuttx.bin to SPI-Flash

  $ pip3 install kflash
  $ kflash -p /dev/ttyUSB0 -b 1500000 ./nuttx/nuttx.bin

6. TODO

  Support peripherals such as GPIO/SPI/I2C/...
  Support FPU
  Support memory protection for user mode