d33b0640fe
Pull request for cortex-r4 codes * arm/armv7-r: Add general interrupt controller. This is based on armv7-a gic controller code. Signed-off-by: EunBong Song <eunb.song@samsung.com> * arm/armv7-r: add invalidate dcache in arm_head.S Adding invalidate dcache as a comment in arm_head.S. Signed-off-by: EunBong Song <eunb.song@samsung.com> * arm/armv7-r: Fix some wrong configuration of program status register. PSR_E_BIT bit should be set for big endian system. PSR_A_BIT bis is set automatically as arm cortex-r4 reference manual 3.7.4. So we don't need to set this bit. Signed-off-by: EunBong Song <eunb.song@samsung.com> * arm/armv7-r: Fix some wrong MPU register definition. Change MPU_RBAR_ADDR_MASK and MPU_RACR_TEX_SHIFT mask as arm cortex-r4 reference manual. Region Base Address Register 0-4 bits are reserved. MPU Region Access control register type 3-5 bits. Signed-off-by: EunBong Song <eunb.song@samsung.com> * driver/mtd: fix compilation error. This commit fixes below compilation errors. CC: mtd/smart.c mtd/smart.c:182:22: error: 'gWearBitToLevelMap4' defined but not used [-Werror=unused-const-variable=] static const uint8_t gWearBitToLevelMap4[] = ^~~~~~~~~~~~~~~~~~~ mtd/smart.c:170:22: error: 'gWearLevelToBitMap4' defined but not used [-Werror=unused-const-variable=] static const uint8_t gWearLevelToBitMap4[] = ^~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors make[1]: *** [smart.o] Error 1 Signed-off-by: Junyeon LEE <junyeon2.lee@samsung.com> Approved-by: GregoryN <gnutt@nuttx.org> |
||
---|---|---|
.. | ||
include | ||
src | ||
Kconfig |