146975d069
Supported drivers - Serial(PL011), Timer, NVIC
127 lines
5.3 KiB
C
127 lines
5.3 KiB
C
/****************************************************************************
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* arch/arm/include/cxd32xx/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_CXD32XX_IRQ_H
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#define __ARCH_ARM_INCLUDE_CXD32XX_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map
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* directly to bits in the NVIC. This does, however, waste several words of
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* memory in the IRQ to handle mapping tables.
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*/
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/* Processor Exceptions (vectors 0-15) */
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#define CXD32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
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/* Vector 0: Reset stack pointer value */
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/* Vector 1: Reset (not handler as an IRQ) */
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#define CXD32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
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#define CXD32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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#define CXD32_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
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#define CXD32_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
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#define CXD32_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
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#define CXD32_IRQ_SIGNVALUE (7) /* Vector 7: Sign value */
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#define CXD32_IRQ_SVCALL (11)/* Vector 11: SVC call */
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#define CXD32_IRQ_DBGMONITOR (12)/* Vector 12: Debug Monitor */
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/* Vector 13: Reserved */
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#define CXD32_IRQ_PENDSV (14)/* Vector 14: Pendable system service request */
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#define CXD32_IRQ_SYSTICK (15)/* Vector 15: System tick */
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#define CXD32_IRQ_EXTINT (16)/* Vector 16: Vector number of the first external interrupt */
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/* Cortex-M4 External interrupts (vectors >= 16) */
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#define CXD32_IRQ_XXX (CXD32_IRQ_EXTINT+0) /* XXX IRQ number */
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/* XXX The details of interrupt number will be described later. */
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#define CXD32_IRQ_UART0 (CXD32_IRQ_EXTINT+73) /* 16+73: UART0 interrupt */
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#define CXD32_IRQ_TIM01 (CXD32_IRQ_EXTINT+77) /* 16+77: TIMER0_1 interrupt */
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#define CXD32_IRQ_TIM02 (CXD32_IRQ_EXTINT+78) /* 16+78: TIMER0_2 interrupt */
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#define CXD32_IRQ_TIM11 (CXD32_IRQ_EXTINT+79) /* 16+79: TIMER1_1 interrupt */
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#define CXD32_IRQ_TIM12 (CXD32_IRQ_EXTINT+80) /* 16+80: TIMER1_2 interrupt */
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#define CXD32_IRQ_TIM21 (CXD32_IRQ_EXTINT+81) /* 16+81: TIMER2_1 interrupt */
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#define CXD32_IRQ_TIM22 (CXD32_IRQ_EXTINT+82) /* 16+82: TIMER2_2 interrupt */
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#define CXD32_IRQ_TIM31 (CXD32_IRQ_EXTINT+83) /* 16+83: TIMER3_1 interrupt */
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#define CXD32_IRQ_TIM32 (CXD32_IRQ_EXTINT+84) /* 16+84: TIMER3_2 interrupt */
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#define CXD32_IRQ_TIM41 (CXD32_IRQ_EXTINT+85) /* 16+85: TIMER4_1 interrupt */
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#define CXD32_IRQ_TIM42 (CXD32_IRQ_EXTINT+86) /* 16+86: TIMER4_2 interrupt */
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#define CXD32_IRQ_NEXTINT (128)
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#define CXD32_IRQ_NIRQS (CXD32_IRQ_EXTINT+CXD32_IRQ_NEXTINT)
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/* Total number of IRQ numbers (This will need to be revisited if/when the
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* Cortex-M0 is supported)
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*/
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#define NR_VECTORS CXD32_IRQ_NIRQS
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#define NR_IRQS CXD32_IRQ_NIRQS
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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typedef void (*vic_vector_t)(uint32_t *regs);
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_CXD32XX_IRQ_H */
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