Gregory Nutt d3beea967d Cortex-M7: Add support for enabled the D-Cache in write only mode. ...

SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.

2015-03-29 14:42:03 -06:00

arch

Cortex-M7: Add support for enabled the D-Cache in write only mode.

2015-03-29 14:42:03 -06:00

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