126 lines
5.0 KiB
C
126 lines
5.0 KiB
C
/****************************************************************************
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* arch/arm/src/lpc43/lpc43_rgu.c
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* arch/arm/src/chip/lpc43_rgu.c
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <nuttx/arch.h>
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#include "nvic.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "lpc43_rgu.h"
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lpc43_softreset
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*
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* Description:
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* Reset as many of the LPC43 peripherals as possible. This is necessary
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* because the LPC43 does not provide any way of performing a full system
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* reset under debugger control. So, if CONFIG_DEBUG is set (indicating
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* that a debugger is being used?), the boot logic will call this
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* function on all restarts.
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*
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* Assumptions:
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* Since this function is called early in the boot sequence, it cannot
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* depend on anything such as initialization of .bss or .data. It can
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* only assume that it has a stack.
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*
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****************************************************************************/
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void lpc43_softreset(void)
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{
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irqstate_t flags;
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/* Disable interrupts */
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flags = irqsave();
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/* Reset all of the peripherals that we can (safely) */
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putreg32((RGU_CTRL0_LCD_RST | RGU_CTRL0_USB0_RST |
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RGU_CTRL0_USB1_RST | RGU_CTRL0_DMA_RST |
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RGU_CTRL0_SDIO_RST | RGU_CTRL0_ETHERNET_RST |
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RGU_CTRL0_GPIO_RST), LPC43_RGU_CTRL0);
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putreg32((RGU_CTRL1_TIMER0_RST | RGU_CTRL1_TIMER1_RST |
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RGU_CTRL1_TIMER2_RST | RGU_CTRL1_TIMER3_RST |
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RGU_CTRL1_RITIMER_RST | RGU_CTRL1_SCT_RST |
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RGU_CTRL1_MCPWM_RST | RGU_CTRL1_QEI_RST |
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RGU_CTRL1_ADC0_RST | RGU_CTRL1_ADC1_RST |
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RGU_CTRL1_USART0_RST | RGU_CTRL1_UART1_RST |
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RGU_CTRL1_USART2_RST | RGU_CTRL1_USART3_RST |
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RGU_CTRL1_I2C0_RST | RGU_CTRL1_I2C1_RST |
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RGU_CTRL1_SSP0_RST | RGU_CTRL1_SSP1_RST |
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RGU_CTRL1_I2S_RST | RGU_CTRL1_CAN1_RST |
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RGU_CTRL1_CAN0_RST | RGU_CTRL1_M0APP_RST),
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LPC43_RGU_CTRL1);
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/* A delay seems to be necessary somewhere around here */
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up_mdelay(20);
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/* Clear all pending interupts */
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putreg32(0xffffffff, NVIC_IRQ0_31_CLRPEND);
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putreg32(0xffffffff, NVIC_IRQ32_63_CLRPEND);
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irqrestore(flags);
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}
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