d5be1acf06
We cannot accept any new files into the repository that do not have Apache 2.0 license headers.
This reverts commit 00eccfd4fa.
303 lines
10 KiB
C
303 lines
10 KiB
C
/*****************************************************************************
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* boards/arm/stm32l4/nucleo-l432kc/include/board.h
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*
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* Copyright (C) 2016, 2018-2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#ifndef __BOARDS_ARM_STM32L4_NUCLEO_L432KC_INCLUDE_BOARD_H
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#define __BOARDS_ARM_STM32L4_NUCLEO_L432KC_INCLUDE_BOARD_H
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/*****************************************************************************
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* Included Files
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*****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/* Clocking ******************************************************************/
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#if defined(CONFIG_ARCH_CHIP_STM32L432KC)
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# include <arch/board/nucleo-l432kc.h>
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#endif
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/* Do not include STM32L4 header files here */
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/*****************************************************************************
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* Pre-processor Definitions
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*****************************************************************************/
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/* DMA Channel/Stream Selections *********************************************/
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/* Stream selections are arbitrary for now but might become important in the
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* future is we set aside more DMA channels/streams.
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*/
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/* Values defined in arch/arm/src/stm32l4/hardware/stm32l4x3xx_dma.h */
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#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices */
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#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices */
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/* UART RX DMA configurations */
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#define DMACHAN_USART1_RX DMACHAN_USART1_RX_2
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/* ADC */
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#define ADC1_DMA_CHAN DMACHAN_ADC1_1
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/* Alternate function pin selections *****************************************/
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/* USART1:
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* RXD: PA10 CN9 pin 3, CN10 pin 33
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* PB7 CN7 pin 21
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* TXD: PA9 CN5 pin 1, CN10 pin 21
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* PB6 CN5 pin 3, CN10 pin 17
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*/
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#if defined(CONFIG_ARCH_BOARD_USART1_RX_PA10)
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# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
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#elif defined(CONFIG_ARCH_BOARD_USART1_RX_PB7)
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# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
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#endif
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#if defined(CONFIG_ARCH_BOARD_USART1_TX_PA9)
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# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
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#elif defined(CONFIG_ARCH_BOARD_USART1_TX_PB6)
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# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
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#endif
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/* USART2: Connected to STLInk Debug via PA2(TX), PA15(RX) */
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#if defined(CONFIG_ARCH_BOARD_USART2_RX_PA3)
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# define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
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#elif defined(CONFIG_ARCH_BOARD_USART2_RX_PA15)
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# define GPIO_USART2_RX GPIO_USART2_RX_2 /* PA15 */
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#endif
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#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
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#define GPIO_USART2_RTS GPIO_USART2_RTS_2
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#define GPIO_USART2_CTS GPIO_USART2_CTS_2
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/* LPUART1 */
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#if defined(CONFIG_ARCH_BOARD_LPUART1_RX_PA3)
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# define GPIO_LPUART1_RX GPIO_LPUART1_RX_1 /* PA3 */
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#endif
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#if defined(CONFIG_ARCH_BOARD_LPUART1_TX_PA2)
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# define GPIO_LPUART1_TX GPIO_LPUART1_TX_1 /* PA2 */
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#endif
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/* I2C
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*
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* On Arduino the I2C bus is available at positions A4 and A5. On the
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* nucleo-1432kc board the I2C bus pins (PB6 and PB7) are connected to
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* pins A4 and A5 through the SB16 and SB18 solder bridges.
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*
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* If these solder bridges are open, then Arduino D4(PA5) and D5(PA6)
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* pins are not supported. PA5 and PA6 must be configured as input
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* floating.
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*
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* The optional _GPIO configurations allow the I2C driver to manually
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* reset the bus to clear stuck slaves. They match the pin configuration,
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* but are normally-high GPIOs.
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*/
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#define GPIO_I2C1_D4 \
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(GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
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#define GPIO_I2C1_D5 \
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(GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
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#define GPIO_I2C1_SCL \
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(GPIO_I2C1_SCL_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
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#define GPIO_I2C1_SDA \
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(GPIO_I2C1_SDA_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
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#define GPIO_I2C1_SCL_GPIO \
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(GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
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GPIO_PORTB | GPIO_PIN6)
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#define GPIO_I2C1_SDA_GPIO \
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(GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
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GPIO_PORTB | GPIO_PIN7)
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/* SPI */
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#if 1
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/* On Arduino the SPI bus is available at positions D10 (SPI_CS), D11
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* (SPI_MOSI), D12 (SPI_MISO), D13 (SPI_SCK). On the nucleo-1432kc board
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* the SPI bus is available at PA11 (SPI_CS, made by GPIO), PB5 (SPI1_MOSI),
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* PB4 (SPI1_MISO), PB3 (SPI1_SCK).
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*/
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# define GPIO_SPI1_MISO GPIO_SPI1_MISO_3 /* PB4 */
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# define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_3 /* PB5 */
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# define GPIO_SPI1_SCK GPIO_SPI1_SCK_3 /* PB3 */
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#else
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/* Optionally it is possible to use SPI bus on pins PA5, PA6 and PA7 but this
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* is incompatible with Arduino nano specification.
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*/
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# define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */
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# define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 /* PA7 */
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# define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* PA5 */
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#endif
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/* LEDs
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*
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* The Nucleo l432kc board provides a single user LED, LD3. LD3
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* is the green LED connected to Arduino signal D13 corresponding to
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* MCU I/O PB3 (pin 26).
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*
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* - When the I/O is HIGH value, the LED is on.
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* - When the I/O is LOW, the LED is off.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LD3 0
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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#define BOARD_LD3_BIT (1 << BOARD_LD3)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
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* events as follows when the red LED (PE24) is available:
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*
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* SYMBOL Meaning LD3
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* ------------------- ----------------------- -----------
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* LED_STARTED NuttX has been started OFF
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* LED_HEAPALLOCATE Heap has been allocated OFF
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* LED_IRQSENABLED Interrupts enabled OFF
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* LED_STACKCREATED Idle stack created ON
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* LED_INIRQ In an interrupt No change
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* LED_SIGNAL In a signal handler No change
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* LED_ASSERTION An assertion failed No change
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* LED_PANIC The system has crashed Blinking
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* LED_IDLE MCU is is sleep mode Not used
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*
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* Thus if LD3 NuttX has successfully booted and is, apparently, running
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* normally. If LD3 is flashing at approximately 2Hz, then a fatal error
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* has been detected and the system has halted.
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*/
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 0
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#define LED_IRQSENABLED 0
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#define LED_STACKCREATED 1
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#define LED_INIRQ 1
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#define LED_SIGNAL 2
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#define LED_ASSERTION 2
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#define LED_PANIC 1
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/* Quadrature encoder
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* Default is to use timer 5 (32-bit) and encoder on PA0/PA1
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*/
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#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1
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#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
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#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_3
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#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_3
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#define GPIO_TIM5_CH1IN GPIO_TIM5_CH1IN_1
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#define GPIO_TIM5_CH2IN GPIO_TIM5_CH2IN_1
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/* PWM output for full bridge, uses config 1, because port E is N/A on QFP64
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* CH1 | 1(A8) 2(E9)
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* CH2 | 1(A9) 2(E11)
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* CHN1 | 1(A7) 2(B13) 3(E8)
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* CHN2 | 1(B0) 2(B14) 3(E10)
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*/
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#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
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#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1
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#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1
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#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1
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/* LPTIM2 PWM output
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* REVISIT : Add support for the other clock sources, LSE, LSI and HSI
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*
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* CH1 | 1(A4) 2(A8)
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*/
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#if defined(CONFIG_STM32L4_LPTIM2_CLK_APB1)
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# define STM32L4_LPTIM2_FREQUENCY STM32L4_APB1_LPTIM2_CLKIN
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#endif
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#if 1
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# define GPIO_LPTIM2_CH1OUT GPIO_LPTIM2_OUT_1
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#else
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# define GPIO_LPTIM2_CH1OUT GPIO_LPTIM2_OUT_2
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#endif
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/*****************************************************************************
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* Public Data
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*****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/*****************************************************************************
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* Public Function Prototypes
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*****************************************************************************/
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/*****************************************************************************
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* Name: stm32l4_board_initialize
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*
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* Description:
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* All STM32L4 architectures must provide the following entry point. This
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* entry point is called early in the initialization -- after all memory has
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* been configured and mapped but before any devices have been initialized.
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*
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*****************************************************************************/
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void stm32l4_board_initialize(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_ARM_STM32L4_NUCLEO_L432KC_INCLUDE_BOARD_H */
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