nuttx/arch/risc-v/include/barriers.h
Ville Juven 9b5746cb5f riscv/barrier: Define more granular memory barriers
Separate barriers for full (memory + I/O) and local memory (cache) flushing.
2023-06-14 16:14:57 -03:00

41 lines
1.5 KiB
C

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#ifndef __ARCH_RISCV_INCLUDE_BARRIERS_H
#define __ARCH_RISCV_INCLUDE_BARRIERS_H
/* Common memory barriers (p=predecessor, s=successor) */
#define __FENCE(p, s) __asm__ __volatile__ ("fence "#p", "#s ::: "memory")
/* __DMB() is used to flush local data caches (memory) */
#define __DMB() __FENCE(rw, rw)
/* __MB() is a full memory barrier */
#define __MB() __FENCE(iorw, iorw)
/* __ISB() is used to synchronize the instruction and data streams */
#define __ISB() __asm__ __volatile__ ("fence.i" ::: "memory")
#endif /* __ARCH_RISCV_INCLUDE_BARRIERS_H */