Dong Heng c655870b22 boards/esp32s3: Link stack checking function and data to SRAM when enable flash or PSRAM driver ...

During PSRAM initialization and flash operations, the Cache needs to be disabled.
So all data and code for the aforementioned scope is required to be placed in Internal RAM.

2023-11-09 13:27:31 +01:00

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.gitignore

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esp32s3_aliases.ld

xtensa/esp32s3: LCD controller driver

2023-09-19 11:38:05 +08:00

esp32s3_peripherals.ld

espressif: Add missing Apache Foundation copyright header

2023-01-19 10:11:34 +08:00

esp32s3_rom_aliases.ld

arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3

2023-08-14 16:29:21 -03:00

esp32s3_rom_api.ld

arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3

2023-08-14 16:29:21 -03:00

esp32s3_rom.ld

arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3

2023-08-14 16:29:21 -03:00

flat_memory.ld

arch/xtensa/esp32s3: Update MCUboot build process

2023-08-18 14:44:11 +08:00

kernel-space.ld

esp32s3/wifi: support the Wi-Fi to work with protected build

2023-08-02 21:38:44 +02:00

legacy_sections.ld

boards/esp32s3: Link stack checking function and data to SRAM when enable flash or PSRAM driver

2023-11-09 13:27:31 +01:00

mcuboot_sections.ld

esp32[c3|s3]: Fix relative path in file header

2023-01-19 10:11:34 +08:00

protected_memory.ld

arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3

2023-08-14 16:29:21 -03:00

user-space.ld

xtensa/esp32s3: Configure the PMS peripheral for Protected Mode

2022-12-07 03:07:45 +08:00