7a9457bb07
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
472 lines
9.7 KiB
ArmAsm
472 lines
9.7 KiB
ArmAsm
/************************************************************
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* up_head.S
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************/
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/************************************************************
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* Included Files
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************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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#include "up_internal.h"
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.module up_head
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.optsdcc -mmcs51 --model-large
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/************************************************************
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* Private Data
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************************************************************/
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.area REG_BANK_0 (REL,OVR,DATA)
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.ds 8
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#ifndef CONFIG_8052_TIMER2
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.area XSEG
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_g_timer0tick:
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.ds 1
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#endif
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/************************************************************
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* Public Data
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************************************************************/
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.globl _g_irqtos
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.globl _g_irqcontext
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.globl _g_irqregs
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/************************************************************
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* Public Functions
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************************************************************/
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.globl _irq_dispatch
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.globl _up_restoreregisters
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/************************************************************
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* Program entry points
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************************************************************/
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/* Program entry is through PROGRAM_BASE. This is just a
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* branch to our start up logic.
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*/
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.area CODE1 (ABS)
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.org PROGRAM_BASE
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ljmp start
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/* These are indirect interrupt vectors. Logic in PAULMON2,
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* captures the interrupt vectors (near address 0x0000) and
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* re-routes them through the following entry points.
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*
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* Each of these saves acc and ie then passes the IRQ number
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* to higher level logic in a
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*/
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.org PM2_VECTOR_EXTINT0
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push acc
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mov a, #EXT_INT0_IRQ
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ljmp _up_interrupt
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.org PM2_VECTOR_TIMER0
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push acc
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#ifdef CONFIG_8052_TIMER2
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mov a, #TIMER0_IRQ
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ljmp _up_interrupt
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#else
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ljmp _up_timer0
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#endif
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.org PM2_VECTOR_EXTINT1
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push acc
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mov a, #EXT_INT1_IRQ
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ljmp _up_interrupt
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.org PM2_VECTOR_TIMER1
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push acc
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mov a, #TIMER1_IRQ
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ljmp _up_interrupt
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.org PM2_VECTOR_UART
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push acc
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mov a, #UART_IRQ
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ljmp _up_interrupt
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.org PM2_VECTOR_TIMER2
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push acc
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mov a, #TIMER2_IRQ
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ljmp _up_interrupt
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/************************************************************
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* Name: start
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*
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* Description:
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* This is the initial entry point into NuttX
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*
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************************************************************/
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start:
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mov sp, #(STACK_BASE-1)
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#ifdef CONFIG_ARCH_LEDS
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lcall _up_ledinit
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#endif
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ljmp _os_start
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/************************************************************
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* Name: up_timer0
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*
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* Description:
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* Timer 0, mode 0 can be used as a system timer. In that
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* mode, the 1.8432 MHz clock is divided by 32. A single
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* 8-bit value is incremented at 57600 Hz, which results
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* in 225 Timer 0 overflow interrupts per second.
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*
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* The Timer0 interrupt vectors to this point which then
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* does a software divide by 2 to get a system timer of
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* 112.5Hz.
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*
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* On Entry:
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*
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* (1) acc on the stack and
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* (2) the IRQ number(TIMER0_IRQ) in the accumulator
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*
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************************************************************/
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#ifndef CONFIG_8052_TIMER2
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_up_timer0:
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ar2 = 0x02
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ar3 = 0x03
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ar4 = 0x04
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ar5 = 0x05
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ar6 = 0x06
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ar7 = 0x07
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ar0 = 0x00
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ar1 = 0x01
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/* ACC already on the stack; push IE. Then disable interrupts */
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push ie
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clr ea
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/* Save the remaining registers with interrupts disabled
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*
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* a, ie, and dptr go on the stack.
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*/
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push dpl
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push dph
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/* Increment the tick counter */
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mov dptr, #_g_timer0tick
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movx a, @dptr
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inc a
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movx @dptr, a
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/* If bit 0 is '0', then just return from the interrupt */
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anl a, #0x01
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jnz 00101$
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ljmp _up_timer0exit
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/* If bit 0 is '1', then process the interrupt */
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00101$:
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mov a, #TIMER0_IRQ
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sjmp _up_timer0join
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#endif
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/************************************************************
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* Name: up_interrupt
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*
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* Description:
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* All interrupts vector to this point with:
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*
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* (1) acc on the stack and
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* (2) the IRQ number in the accumulator
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*
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************************************************************/
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_up_interrupt:
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ar2 = 0x02
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ar3 = 0x03
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ar4 = 0x04
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ar5 = 0x05
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ar6 = 0x06
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ar7 = 0x07
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ar0 = 0x00
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ar1 = 0x01
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/* ACC already on the stack; push IE. Then disable interrupts */
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push ie
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clr ea
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/* Save the remaining registers with interrupts disabled
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*
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* a, ie, and dptr go on the stack.
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*/
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push dpl
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push dph
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_up_timer0join:
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/* Other registers go into the IRQ register save area */
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push acc
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mov dptr, #_g_irqregs
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lcall _up_saveregisters
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/* Show interrupt status on the LEDs */
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#ifdef CONFIG_ARCH_LEDS
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mov dpl, #LED_INIRQ
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lcall _up_ledon
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#endif
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/* Save the IRQ number in r2 */
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pop ar2
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/* Mark that we are in an interrupt and provide the top
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* of stack pointer to the context switching logic.
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*/
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mov dptr, #_g_irqtos
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mov a, sp
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movx @dptr, a
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/* Nullify the context pointer. If a context switch is
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* needed, this will be set to the address of the context
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* structure.
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*/
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mov dptr, #_g_irqcontext
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clr a
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movx @dptr,a
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inc dptr
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movx @dptr,a
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/* Now call void irq_dispatch(int irq, FAR void *context)
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*
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* First, create the first argument as (int)irqno
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*/
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mov dpl, r2
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mov dph, #0
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/* Create the second argument (void *context) on the stack */
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push sp
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clr a
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push acc
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/* Then dispatch the IRQ. */
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lcall _irq_dispatch
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pop acc
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pop acc
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/* Indicate that we are no longer in an interrupt */
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mov dptr, #_g_irqtos
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clr a
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movx @dptr, a
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/* Check if a context switch is pending */
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mov dptr,#_g_irqcontext
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movx a, @dptr
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mov r2, a
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inc dptr
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movx a, @dptr
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mov r3, a
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orl a, r2
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jnz 00001$
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/* No context switch is pending. Restore registers
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* from the interrupt register save area.
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*/
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mov dptr, #_g_irqregs
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sjmp 00004$
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00001$: /****************************************************/
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/* A context switch is pending, clear g_irqcontext */
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mov dpl, r2
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mov dph, r3
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clr a
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movx @dptr, a
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inc dptr
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movx @dptr, a
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#ifdef CONFIG_INTERRUPT_FRAME_DUMP
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mov dpl, r2
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mov dph, r3
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push ar2
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push ar3
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lcall _up_dumpframe
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pop ar3
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pop ar2
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#endif
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/* Register usage in the following:
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*
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* R0 - Holds working the 8-bit IRAM pointer
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* R1 - Not used
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* R2-3 - Holds the working 16-bit XRAM pointer
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* R4 - Holds the working byte count
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* R5 - Holds the new stack pointer
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* R6-7 - Not used
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*/
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/* Fetch r4 = context->nbytes */
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mov dpl, r2
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mov dph, r3
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movx a, @dptr
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mov r4, a
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/* Save the new stack pointer in r5 */
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add a, #(STACK_BASE-1)
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mov r5, a
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/* Save r2-3 = &context->stack */
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inc dptr
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push dpl
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push dph
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mov r2, dpl
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mov r3, dph
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/* Set r0 = stack base address */
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mov r0, #STACK_BASE
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/* Top of the copy loop */
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00002$:
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mov a, r4 /* a = bytes left to transfer */
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dec r4 /* (for next time through the loop) */
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jz 00003$ /* Jump if a = 0 (done) */
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/* Fetch the next byte from context->stack */
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mov dpl, r2
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mov dph, r3
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movx a,@dptr
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/* Increment the XRAM pointer */
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inc dptr
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mov r2, dpl
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mov r3, dph
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/* Save the next byte into IRAM */
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mov @r0, a
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/* Increment the IRAM pointer */
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inc r0
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sjmp 00002$
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/* The entire stack has been copied from XRAM into
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* IRAM. Set the new stack pointer
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*/
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00003$:
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pop dph
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pop dpl
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mov sp, r5
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#ifdef CONFIG_INTERRUPT_FRAME_DUMP
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push dpl
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push dph
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lcall _up_dumpstack
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pop dph
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pop dpl
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#endif
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/* Get the pointer to the register save area */
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mov a, #STACK_SIZE
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add a, dpl
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mov dpl, a
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clr a
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addc a, dph
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mov dph, a
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00004$: /****************************************************/
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/* Restore the context from the register save area
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* and return from the interrupt. At this point, dptr
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* holds the pointer to the memory region that holds
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* the register save area. This could be either
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* g_irqregs (no context switch) or &g_irqcontext->regs
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* (context switch).
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*/
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#ifdef CONFIG_ARCH_LEDS
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push dpl
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push dph
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mov dpl, #LED_INIRQ
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lcall _up_ledoff
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pop dph
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pop dpl
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#endif
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/* Restore registers from the register save area */
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lcall _up_restoreregisters
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_up_timer0exit:
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/* Restore registers from the stack and return */
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pop dph
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pop dpl
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/* Restore the interrupt state per the stored IE value */
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pop acc
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jb acc.7,00005$
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clr ie.7
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sjmp 00006$
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00005$:
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setb ie.7
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00006$:
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pop acc
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reti
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