245 lines
6.4 KiB
Plaintext
245 lines
6.4 KiB
Plaintext
############################################################################
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# arch/arm/src/stm32l4/Make.defs
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#
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# Copyright (C) 2017 Gregory Nutt. All rights reserved.
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# Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
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# Author: Sebastien Lorquet <sebastien@lorquet.fr>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# The start-up, "head", file. Only common vectors are support so there
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# isn't one.
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HEAD_ASRC =
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# Common ARM and Cortex-M4 files (copied from stm32/Make.defs)
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CMN_UASRCS =
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CMN_UCSRCS =
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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CMN_ASRCS += vfork.S
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c
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CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
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CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
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CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
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CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
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CMN_CSRCS += up_systemreset.c up_unblocktask.c up_usestack.c up_doirq.c
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CMN_CSRCS += up_hardfault.c up_svcall.c up_vfork.c
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# Configuration-dependent common files
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += up_stackcheck.c
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endif
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += up_lazyexception.S
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else
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CMN_ASRCS += up_exception.S
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endif
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CMN_CSRCS += up_vectors.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += up_fpu.S
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ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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CMN_CSRCS += up_copyarmstate.c
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else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_CSRCS += up_copyarmstate.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
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ifneq ($(CONFIG_DISABLE_SIGNALS),y)
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CMN_CSRCS += up_signal_dispatch.c
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CMN_UASRCS += up_signal_handler.S
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endif
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endif
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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# Required STM32L4 files
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CHIP_ASRCS =
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CHIP_CSRCS = stm32l4_allocateheap.c stm32l4_exti_gpio.c stm32l4_gpio.c
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CHIP_CSRCS += stm32l4_irq.c stm32l4_lowputc.c stm32l4_rcc.c
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CHIP_CSRCS += stm32l4_serial.c stm32l4_start.c stm32l4_waste.c stm32l4_uid.c
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CHIP_CSRCS += stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c stm32l4_lsi.c
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CHIP_CSRCS += stm32l4_pwr.c stm32l4_tim.c stm32l4_flash.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += stm32l4_idle.c
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endif
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += stm32l4_tim_lowerhalf.c
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endif
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += stm32l4_timerisr.c
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else
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CHIP_CSRCS += stm32l4_tickless.c
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endif
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ifeq ($(CONFIG_STM32L4_ONESHOT),y)
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CHIP_CSRCS += stm32l4_oneshot.c stm32l4_oneshot_lowerhalf.c
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endif
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ifeq ($(CONFIG_STM32L4_FREERUN),y)
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CHIP_CSRCS += stm32l4_freerun.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += stm32l4_userspace.c stm32l4_mpuinit.c
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endif
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ifeq ($(CONFIG_STM32L4_ADC),y)
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CHIP_CSRCS += stm32l4_adc.c
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endif
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ifeq ($(CONFIG_STM32L4_DAC),y)
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CHIP_CSRCS += stm32l4_dac.c
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endif
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ifeq ($(CONFIG_STM32L4_DFSDM),y)
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CHIP_CSRCS += stm32l4_dfsdm.c
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endif
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ifeq ($(CONFIG_STM32L4_DMA),y)
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CHIP_CSRCS += stm32l4_dma.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32L4_OTGFS),y)
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CHIP_CSRCS += stm32l4_otgfsdev.c
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endif
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endif
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ifeq ($(CONFIG_USBHOST),y)
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ifeq ($(CONFIG_STM32L4_OTGFS),y)
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CHIP_CSRCS += stm32l4_otgfshost.c
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endif
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endif
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ifeq ($(CONFIG_USBHOST),y)
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ifeq ($(CONFIG_USBHOST_TRACE),y)
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CHIP_CSRCS += stm32l4_usbhost_trace.c
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else
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ifeq ($(CONFIG_DEBUG_USB),y)
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CHIP_CSRCS += stm32l4_usbhost_trace.c
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endif
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endif
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endif
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ifeq ($(CONFIG_PM),y)
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CHIP_CSRCS += stm32l4_pmlpr.c stm32l4_pmsleep.c stm32l4_pmstandby.c
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CHIP_CSRCS += stm32l4_pmstop.c
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ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
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CHIP_CSRCS += stm32l4_pminitialize.c
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endif
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endif
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ifeq ($(CONFIG_STM32L4_PWR),y)
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CHIP_CSRCS += stm32l4_exti_pwr.c
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endif
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ifeq ($(CONFIG_RTC),y)
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ifeq ($(CONFIG_RTC_ALARM),y)
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CHIP_CSRCS += stm32l4_exti_alarm.c
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endif
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ifeq ($(CONFIG_RTC_PERIODIC),y)
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CHIP_CSRCS += stm32l4_exti_wakeup.c
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endif
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += stm32l4_rtc_lowerhalf.c
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CHIP_CSRCS += stm32l4_rtc.c
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endif
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endif
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ifeq ($(CONFIG_DEBUG_FEATURES),y)
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CHIP_CSRCS += stm32l4_dumpgpio.c
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endif
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ifeq ($(CONFIG_STM32L4_COMP),y)
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CHIP_CSRCS += stm32l4_comp.c stm32l4_exti_comp.c
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endif
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ifeq ($(CONFIG_STM32L4_RNG),y)
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CHIP_CSRCS += stm32l4_rng.c
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endif
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ifeq ($(CONFIG_STM32L4_SAI),y)
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CHIP_CSRCS += stm32l4_sai.c
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endif
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ifeq ($(CONFIG_STM32L4_LPTIM),y)
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CHIP_CSRCS += stm32l4_lptim.c
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endif
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ifeq ($(CONFIG_PWM),y)
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CHIP_CSRCS += stm32l4_pwm.c
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endif
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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CHIP_CSRCS += stm32l4_qencoder.c
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endif
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ifeq ($(CONFIG_STM32L4_QSPI),y)
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CHIP_CSRCS += stm32l4_qspi.c
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endif
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ifeq ($(CONFIG_STM32L4_CAN),y)
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CHIP_CSRCS += stm32l4_can.c
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endif
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ifeq ($(CONFIG_STM32L4_FIREWALL),y)
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CHIP_CSRCS += stm32l4_firewall.c
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endif
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ifeq ($(CONFIG_STM32L4_IWDG),y)
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CHIP_CSRCS += stm32l4_iwdg.c
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endif
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ifeq ($(CONFIG_STM32L4_SDMMC1),y)
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CHIP_CSRCS += stm32l4_sdmmc.c
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endif
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