git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4887 42af7a65-404d-4744-a932-0658087f49c3
303 lines
12 KiB
C
303 lines
12 KiB
C
/********************************************************************************************
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* arch/arm/src/lpc43xx/lpc43_gpio.h
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC43XX_GPIO_H
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#define __ARCH_ARM_SRC_LPC43XX_GPIO_H
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/********************************************************************************************
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* Included Files
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********************************************************************************************/
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#include <nuttx/config.h>
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/* Include the chip capabilities and GPIO definitions file */
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#include "chip.h"
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#include "chip/lpc43_gpio.h"
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/********************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************/
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#define NUM_GPIO_PORTS 8
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#define NUM_GPIO_PINS 32
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/* Each configurable pin can be individually configured by software in several modes. The
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* following definitions provide the bit encoding that is used to define a pin configuration.
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* Note that these pins do not corresponding GPIO ports and pins.
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*
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* 16-bit Encoding:
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* Normal: .MM. .... PPPB BBBB
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* Interrupt: .MMG GPII PPPB BBBB
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*/
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/* GPIO mode:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .MM. .... .... ....
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*/
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#define GPIO_MODE_SHIFT (13) /* Bits 13-14: Mode of the GPIO pin */
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#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_MODE_INPUT (1 << GPIO_MODE_SHIFT)
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# define GPIO_MODE_OUTPUT (2 << GPIO_MODE_SHIFT)
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# define GPIO_MODE_INTERRUPT (3 << GPIO_MODE_SHIFT)
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#define GPIO_IS_OUTPUT(p) ((p) & GPIO_MODE_MASK) == GPIO_MODE_INPUT)
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#define GPIO_IS_INPUT(p) ((p) & GPIO_MODE_MASK) == GPIO_MODE_OUTPUT)
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#define GPIO_IS_INTERRUPT(p) ((p) & GPIO_MODE_MASK) == GPIO_MODE_INTERRUPT)
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/* Group Interrupt Selection (valid only for interrupt GPIO pins):
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* ...G G... .... ....
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*/
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#define GPIO_GRPINT_SHIFT (11) /* Bits 11-12: Group interrupt selection */
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#define GPIO_GRPINT_MASK (3 << GPIO_GRPINT_SHIFT)
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# define GPIO_GRPINT_NONE (0 << GPIO_GRPINT_SHIFT) /* 00 Not a member of a group */
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# define GPIO_GRPINT_GROUP0 (2 << GPIO_GRPINT_SHIFT) /* 10 Member of group 0 */
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# define GPIO_GRPINT_GROUP1 (3 << GPIO_GRPINT_SHIFT) /* 11 Member of group 1 */
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#define _GPIO_GRPINT (1 << (GPIO_GRPINT_SHIFT+1)) /* Bit 12: 1=Member of a group */
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#define _GPIO_GRPNO (1 << GPIO_GRPINT_SHIFT) /* Bit 11: Group number */
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#define GPIO_IS_GRPINT(p) ((p) & _GPIO_GRPINT) != 0)
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#define GPIO_GRPPNO(p) ((p) & _GPIO_GRPNO) >> GPIO_GRPINT_SHIFT)
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/* Group Interrupt Polarity (valid only for interrupt GPIO group interrupts ):
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... .P.. .... ....
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*/
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#define GPIO_POLARITY (1 << 10) /* Bit 10: Group Polarity */
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#define GPIO_POLARITY_HI GPIO_POLARITY
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#define GPIO_POLARITY_LOW 0
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#define GPIO_IS_POLARITY_HI(p) (((p) & GPIO_POLARITY) != 0)
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#define GPIO_IS_POLARITY_LOW(p) (((p) & GPIO_POLARITY) == 0)
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/* Interrupt Configuration (valid only for interrupt GPIO pins):
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... ..II .... ....
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*/
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#define GPIO_INT_SHIFT (8) /* Bits 8-9: Interrupt mode */
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#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
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# define GPIO_INT_LEVEL_LOW (0 << GPIO_INT_SHIFT) /* 00 Edge=NO, Active=LOW */
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# define GPIO_INT_LEVEL_HI (1 << GPIO_INT_SHIFT) /* 01 Edge=NO, Active=HIGH */
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# define GPIO_INT_EDGE_FALLING (2 << GPIO_INT_SHIFT) /* 10 Edge=YES, Active=LOW */
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# define GPIO_INT_EDGE_RISING (3 << GPIO_INT_SHIFT) /* 11 Edge=YES, Active=LOW */
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#define _GPIO_ACTIVE_HI (1 << GPIO_INT_SHIFT)
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#define _GPIO_EDGE (1 << (GPIO_INT_SHIFT+1))
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#define GPIO_IS_ACTIVE_HI(p) ((p) & _GPIO_ACTIVE_HI) != 0)
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#define GPIO_IS_ACTIVE_LOW(p) ((p) & _GPIO_ACTIVE_HI) == 0)
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#define GPIO_IS_EDGE(p) ((p) & _GPIO_EDGE) != 0)
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#define GPIO_IS_LEVEL(p) ((p) & _GPIO_EDGE) == 0)
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/* GPIO Port Number:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... GPII .... ....
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*/
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#define GPIO_PORT_SHIFT (4) /* Bits 4-6: Port number */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORT0 (0 << GPIO_PORT_SHIFT)
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# define GPIO_PORT1 (1 << GPIO_PORT_SHIFT)
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# define GPIO_PORT2 (2 << GPIO_PORT_SHIFT)
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# define GPIO_PORT3 (3 << GPIO_PORT_SHIFT)
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# define GPIO_PORT4 (4 << GPIO_PORT_SHIFT)
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# define GPIO_PORT5 (5 << GPIO_PORT_SHIFT)
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# define GPIO_PORT6 (6 << GPIO_PORT_SHIFT)
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# define GPIO_PORT7 (7 << GPIO_PORT_SHIFT)
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/* GPIO Pin Number:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... .... ...B BBBB
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*/
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#define GPIO_PIN_SHIFT (0) /* Bits 0-5: Pin number */
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#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
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# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
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# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
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# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
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# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
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# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
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# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
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# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
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# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
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# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
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# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
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# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
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# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
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# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
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# define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
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# define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
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# define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
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/********************************************************************************************
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* Public Types
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********************************************************************************************/
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/********************************************************************************************
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* Public Data
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********************************************************************************************/
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/* Base addresses for each GPIO block */
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extern const uint32_t g_gpiobase[NUM_GPIO_PORTS];
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/********************************************************************************************
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* Public Functions
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********************************************************************************************/
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/********************************************************************************************
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* Name: lpc43_gpioconfig
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*
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* Description:
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* Configure a GPIO based on bit-encoded description of the pin.
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*
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* Returned Value:
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* OK on success; A negated errno value on failure.
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*
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************************************************************************************/
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EXTERN int lpc43_gpioconfig(uint16_t gpiocfg);
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/************************************************************************************
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* Name: lpc43_gpiowrite
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*
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* Description:
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* Write one or zero to the selected GPIO pin
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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EXTERN void lpc43_gpiowrite(uint16_t gpiocfg, bool value);
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/************************************************************************************
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* Name: lpc43_gpioread
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*
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* Description:
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* Read one or zero from the selected GPIO pin
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*
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* Returned Value:
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* The boolean state of the input pin
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*
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************************************************************************************/
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EXTERN bool lpc43_gpioread(uint16_t gpiocfg);
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/************************************************************************************
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* Name: lpc43_gpioattach
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*
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* Description:
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* Attach and enable a GPIO interrupts on the selected GPIO pin, receiving the
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* interrupt with the selected interrupt handler. The GPIO interrupt may be
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* disabled by providing a NULL value for the interrupt handler function pointer.
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*
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* Parameters:
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* - gpiocfg: GPIO pin identification
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* - func: Interrupt handler
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*
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* Returns:
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* The previous value of the interrupt handler function pointer. This value may,
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* for example, be used to restore the previous handler when multiple handlers are
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* used.
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*
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************************************************************************************/
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EXTERN xcpt_t lpc43_gpioattach(uint16_t gpiocfg, xcpt_t func);
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/************************************************************************************
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* Function: lpc43_dumpgpio
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*
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* Description:
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* Dump all pin configuration registers associated with the provided base address
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG
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EXTERN int lpc43_dumpgpio(uint16_t gpiocfg, const char *msg);
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#else
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# define lpc43_dumpgpio(p,m)
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ARCH_ARM_SRC_LPC43XX_GPIO_H */
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