chao an 28044f7d5a arch/risc-v: add support of save/restore vector registers ... Reference: https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc https://github.com/torvalds/linux/blob/master/arch/riscv/include/asm/vector.h Signed-off-by: chao an <anchao@lixiang.com>		2024-04-23 16:18:46 -03:00
..
bl602
bl808	arch/riscv: Add support for Bouffalo Lab BL808 SoC (T-Head C906)	2023-12-12 08:50:03 -08:00
c906
esp32c3	risc-v/espressif: Rename espressif/esp32c3 as esp32c3	2024-01-30 08:32:05 +01:00
esp32c3-legacy	risc-v/esp32c3: Rename legacy approach esp32c3 as esp32c3-legacy	2024-01-30 08:32:05 +01:00
esp32c6	risc-v/espressif: Rename espressif/esp32c3 as esp32c3	2024-01-30 08:32:05 +01:00
esp32h2	risc-v/espressif: Rename espressif/esp32c3 as esp32c3	2024-01-30 08:32:05 +01:00
fe310
hpm6000	Add support for hpm6360evk	2024-02-18 09:17:56 -08:00
hpm6750
jh7110	arch/risc-v: Add support for StarFive JH7110 SoC	2023-08-03 22:55:55 -07:00
k210
k230	risc-v/k230: add IPI support to speed up RPTUN/RPMSG	2024-02-21 04:37:03 -08:00
litex	risc-v/litex: fix typo in litex/irq.h	2024-01-06 04:15:52 -08:00
mpfs
qemu-rv
rv32m1
thead	arch/riscv: add T-HEAD CSR mapping	2024-04-11 22:20:39 +08:00
.gitignore
arch.h	risc-v/arch.h: revising comments	2024-03-25 20:39:24 +08:00
barriers.h	riscv/barrier: Define more granular memory barriers	2023-06-14 16:14:57 -03:00
csr.h	riscv: Add Vector CSRs to csr.h	2024-04-19 00:31:07 +08:00
elf.h	riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly	2023-12-12 17:32:36 -08:00
inttypes.h
irq.h	arch/risc-v: add support of save/restore vector registers	2024-04-23 16:18:46 -03:00
limits.h
mode.h	arch/riscv: force using encoding macro for CSR access	2024-04-11 10:43:48 +08:00
setjmp.h
spinlock.h
stdarg.h
syscall.h
types.h