dad5a79bf3
Summary: - Modify arm_intstack_base() to return "top" of the IRQ stack for the current CPU - This change fixes IRQ stack dump information for ARM SMP - Add arm_intstack_alloc() to return "bottom" of the IRQ stack for the current CPU - Also, these functions are now implemented in xxx_irq.c (imx/cxd56/lc823450) - up_color_intstack() and up_check_intstack() now call arm_intstack_alloc() - These semantics are now consistent with non-SMP case - up_color_intstack() now initializes whole IRQ stack region for SMP - Adjust IRQ stack top address for each CPU (e.g. -8) - Fix setintstack to handle in case of NCPUS=1 (cxd56, lc823450) - Adjust INTSTACK_SIZE to 8 bytes alignment (cxd56, lc823450) - Refactor setintstack for lc823450 - Remove old IRQ stack coloring code from up_irqinitialize() (lc823450) - Introduce g_cpu_intstack_top for lc823450 - Refactor header files Impact: - Affects imx6/cxd56xx/lc823450 SMP with interrupt stack enabled Testing: - Tested with sabre-6quad:smp (with QEMU, NCPUS=1 and 4) - Tested with spresense:wifi_smp (NCPUS=1 and 2) - Tested with lc823450-xgevk:rndis (NCPUS=1 and 2) Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com> |
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