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addrenv.h
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arm_addrenv_kstack.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_addrenv_shm.c
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Replace all occurrences of vdbg with vinfo
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2016-06-11 11:59:51 -06:00 |
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arm_addrenv_ustack.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_addrenv_utils.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_addrenv.c
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Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they.
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2017-05-11 13:35:56 -06:00 |
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arm_allocpage.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_assert.c
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Assertions: Identify the running task correctly when dumping task state information. It takes time to switch to the target task after g_readytorun has been modified. If panic/assert happen during this period, the dump will contain the incorrect and confusing information due to the difference between the real running task and the return value of this_task(). This change resolve this problem by adding g_running_task to track the real running task through the context switch.
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2018-11-15 07:11:51 -06:00 |
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arm_blocktask.c
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Replace all ASSERT with DEBUGASSERT to save the code space
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2018-08-24 06:58:30 -06:00 |
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arm_checkmapping.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_coherent_dcache.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_copyarmstate.c
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arm_copyfullstate.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_cpuhead.S
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_cpuidlestack.c
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_cpuindex.c
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ARM: Remove some obsolete and incorrect conditional compilation
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2016-03-11 12:42:58 -06:00 |
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arm_cpupause.c
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irq_dispatch: Add argument pointer to irq_dispatch
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2017-02-27 06:27:56 -06:00 |
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arm_cpustart.c
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irq_dispatch: Add argument pointer to irq_dispatch
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2017-02-27 06:27:56 -06:00 |
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arm_dataabort.c
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_doirq.c
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Replace all ASSERT with DEBUGASSERT to save the code space
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2018-08-24 06:58:30 -06:00 |
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arm_fetchadd.S
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Some ommissions from previous commit.
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2018-02-04 12:36:51 -06:00 |
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arm_fpuconfig.S
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arm_fullcontextrestore.S
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_gicv2_dump.c
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Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info().
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2016-06-20 11:59:15 -06:00 |
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arm_gicv2.c
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_head.S
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ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
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2016-11-27 10:21:46 -06:00 |
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arm_initialstate.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_l2cc_pl310.c
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armv7-a/armv6-m/arm/a1x: Convert *err() to either *info() or add ERROR:, depending on if an error is reported
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2016-06-17 16:44:50 -06:00 |
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arm_mmu.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_pgalloc.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_pghead.S
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ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
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2016-11-27 10:21:46 -06:00 |
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arm_pginitialize.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_physpgaddr.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_prefetchabort.c
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Make sure that labeling is used consistently in all function headers (part 2).
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2018-02-01 12:03:55 -06:00 |
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arm_releasepending.c
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sched/ and arch/arm/src/armv7-a: Replace a few more occurrences of this_task() with current_task(cpu) in an effort to get the i.MX6 working in SMP mode again. It does not yet work, sadly.
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2018-02-06 11:17:33 -06:00 |
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arm_reprioritizertr.c
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Replace non critical PANIC with DEBUGPANIC to save the code space
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2018-08-24 06:21:15 -06:00 |
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arm_restorefpu.S
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Cosmetic changes from review of last PR
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2016-04-18 06:50:45 -06:00 |
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arm_savefpu.S
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arm_saveusercontext.S
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Cosmetic changes from review of last PR
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2016-04-18 06:50:45 -06:00 |
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arm_schedulesigaction.c
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arch/: Relasted to last big change to force interrupts to be disabled. In the SMP case, we still must call leave_critical_section() at least once in order to compensate for the fact that the irqcount was incremented in up_schedsigaction().
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2018-06-06 17:04:12 -06:00 |
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arm_scu.c
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For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem.
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2016-12-07 09:06:41 -06:00 |
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arm_sigdeliver.c
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Replace all ASSERT with DEBUGASSERT to save the code space
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2018-08-24 06:58:30 -06:00 |
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arm_signal_dispatch.c
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_syscall.c
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arm syscalls: svcall/sycall logic needs to get the ucontext argument from R4 instead of stack since all syscall parameters pass from registers in syscall.h
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2018-08-24 07:11:18 -06:00 |
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arm_testset.S
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armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions.
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2018-02-04 12:22:03 -06:00 |
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arm_unblocktask.c
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Replace all ASSERT with DEBUGASSERT to save the code space
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2018-08-24 06:58:30 -06:00 |
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arm_undefinedinsn.c
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Add underscore at beginning of alert() as well
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2016-06-16 12:38:05 -06:00 |
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arm_va2pte.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_vectoraddrexcptn.S
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arm_vectors.S
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Remove trailing spaces at the end of lines.
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2018-08-13 07:39:38 -06:00 |
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arm_vectortab.S
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arm_vfork.S
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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arm_virtpgaddr.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm.h
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cache.h
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For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem.
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2016-12-07 09:06:41 -06:00 |
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cp15_cacheops.h
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cp15_clean_dcache.S
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cp15_coherent_dcache.S
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cp15_flush_dcache.S
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arch/arm/src/armv7-a: Replicate the same fix was previously commited for the armv7-r.
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2018-09-20 21:40:29 -06:00 |
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cp15_invalidate_dcache_all.S
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cp15_invalidate_dcache.S
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cp15.h
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crt0.c
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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fpu.h
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gic.h
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Fix lots of typos in C comments and Kconfig help text
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2018-07-08 18:24:45 -06:00 |
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gtm.h
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Make sure that labeling is used consistently in all function headers (part 3).
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2018-02-01 12:17:03 -06:00 |
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Kconfig
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Remove CONFIG_ARM_TOOLCHAIN_GNU; replace with CONFIG_ARCH_TOOLCHAIN_GNU
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2017-05-13 13:28:15 -06:00 |
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l2cc_pl310.h
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l2cc.h
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mmu.h
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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mpcore.h
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MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq()
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2016-03-10 08:37:34 -06:00 |
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pgalloc.h
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Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they.
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2017-05-11 13:35:56 -06:00 |
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sctlr.h
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Update some ARM registers for Cortex-A9
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2016-03-29 11:47:35 -06:00 |
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scu.h
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ARMv7-A: Fix some SCU SMP logic
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2016-11-26 18:41:48 -06:00 |
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smp.h
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Make sure that labeling is used consistently in all function headers.
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2018-02-01 10:00:02 -06:00 |
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svcall.h
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Toolchain.defs
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Back out most of 34be3e7c3c and update README again. Windows native tools cannot be used with Ubuntu under Windows 10 now. For Cygwin, that support depends on the 'cygpath -w' tool to convert POSIX paths to Windows paths. There is no corresponding tool for Ubuntu under Windows 10.
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2017-01-01 16:29:03 -06:00 |
