Ville Juven dbc9a5ffa2 riscv_mmu: Add some basic sanity checks for section boundaries ... L3 table maps 2MB of memory, this brings an implicit requirement for any L3 region to be aligned to 2MB. This commit adds build time sanity checks to ensure this requirement is met. For other SvXX architectures the boundary requirement (might be) is different.		2022-10-07 17:26:21 +08:00
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include	riscv: Dump trap val in exception handler	2022-08-30 14:55:33 +08:00
src	riscv_mmu: Add some basic sanity checks for section boundaries	2022-10-07 17:26:21 +08:00
Kconfig	arch: risc-v: Remove FPU support from qemu-rv	2022-09-20 11:40:40 +08:00