RDTSCP instruction reads the current value of the processor’s
time-stamp counter (a 64-bit MSR) into the EDX:EAX registers, and it
also reads the value of the IA32_TSC_AUX MSR (address C0000103H) into
the ECX register. However, the current RDTSCP implementation does not
provide a hint for the compiler that ECX has been changed, resulting in
register corrupted and subtle errors.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
dc7d3470e6