95aa3a11d1
and change the type of divb7 from float32_t to float Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
387 lines
11 KiB
C
387 lines
11 KiB
C
/****************************************************************************
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* arch/arm/src/tms570/tms570_lowputc.c
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*
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* Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Includes some logic from TI sample which has a compatible three-clause
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* BSD license and:
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*
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* Copyright (c) 2012, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <errno.h>
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#include <nuttx/irq.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "arm_arch.h"
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#include "hardware/tms570_sci.h"
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#include "hardware/tms570_iomm.h"
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#include "tms570_lowputc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Select SCI parameters for the selected console */
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#if defined(CONFIG_SCI1_SERIAL_CONSOLE) && defined(CONFIG_TMS570_SCI1)
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# define TMS570_CONSOLE_BASE TMS570_SCI1_BASE
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# define TMS570_CONSOLE_BAUD CONFIG_SCI1_BAUD
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# define TMS570_CONSOLE_BITS CONFIG_SCI1_BITS
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# define TMS570_CONSOLE_PARITY CONFIG_SCI1_PARITY
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# define TMS570_CONSOLE_2STOP CONFIG_SCI1_2STOP
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_SCI2_SERIAL_CONSOLE) && defined(CONFIG_TMS570_SCI2)
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# define TMS570_CONSOLE_BASE TMS570_SCI2_BASE
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# define TMS570_CONSOLE_BAUD CONFIG_SCI2_BAUD
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# define TMS570_CONSOLE_BITS CONFIG_SCI2_BITS
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# define TMS570_CONSOLE_PARITY CONFIG_SCI2_PARITY
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# define TMS570_CONSOLE_2STOP CONFIG_SCI2_2STOP
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# define HAVE_SERIAL_CONSOLE 1
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#else
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# error "No CONFIG_SCIn_SERIAL_CONSOLE Setting"
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# undef HAVE_SERIAL_CONSOLE
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifdef HAVE_SERIAL_CONSOLE
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static const struct sci_config_s g_console_config =
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{
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.baud = TMS570_CONSOLE_BAUD,
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.parity = TMS570_CONSOLE_PARITY,
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.bits = TMS570_CONSOLE_BITS,
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.stopbits2 = TMS570_CONSOLE_2STOP,
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};
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#endif /* HAVE_SERIAL_CONSOLE */
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tms570_sci_initialize
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*
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* Description:
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* Perform one-time initialization of the SCI module.
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*
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****************************************************************************/
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static void tms570_sci_initialize(uint32_t base)
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{
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#if 0
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uint32_t reg;
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reg = 0x83e70b13u;
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putreg32(reg, TMS570_IOMM_KICK0);
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reg = 0x95a4f1e0u;
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putreg32(reg, TMS570_IOMM_KICK1);
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reg = (2 << 16);
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putreg32(reg, TMS570_IOMM_PINMMR7);
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reg = (2 << 0);
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putreg32(reg, TMS570_IOMM_PINMMR8);
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reg = 0;
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putreg32(reg, TMS570_IOMM_KICK0);
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reg = 0;
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putreg32(reg, TMS570_IOMM_KICK1);
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#endif
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/* Bring SCI1 out of reset */
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putreg32(0x0, base + TMS570_SCI_GCR0_OFFSET);
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putreg32(SCI_GCR0_RESET, base + TMS570_SCI_GCR0_OFFSET);
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/* Configure pins */
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/* Pin Function Register: RX is receive pin, TX is transmit pin. */
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putreg32(SCI_PIO_RX | SCI_PIO_TX, base + TMS570_SCI_FUN_OFFSET);
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/* Pin Data Out Register: Output values are logic low. Irrelevant because
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* TX FUNC != 0 and RX FUNC != 0
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*/
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putreg32(0, base + TMS570_SCI_DOUT_OFFSET);
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/* Pin Direction Register: General purpose inputs. Irrelevant because
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* TX FUNC != 0 and RX FUNC != 0.
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*/
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putreg32(0, base + TMS570_SCI_DIR_OFFSET);
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/* Set SCI pins open drain enable: ODR functionality disabled. Irrelevant
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* because TX FUNC != 0 and RX FUNC != 0
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*/
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putreg32(0, base + TMS570_SCI_ODR_OFFSET);
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/* Set SCI pins pullup/pulldown enable: Pull control enabled */
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putreg32(0, base + TMS570_SCI_PD_OFFSET);
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/* Set SCI pins pullup/pulldown select: Pulled up */
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putreg32(SCI_PIO_RX | SCI_PIO_TX, base + TMS570_SCI_PSL_OFFSET);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_lowputc
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*
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* Description:
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* Output one byte on the serial console
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*
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****************************************************************************/
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void arm_lowputc(char ch)
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{
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#ifdef HAVE_SERIAL_CONSOLE
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irqstate_t flags;
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for (; ; )
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{
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/* Wait for the transmitter to be available */
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while ((getreg32(TMS570_CONSOLE_BASE + TMS570_SCI_FLR_OFFSET) &
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SCI_FLR_TXRDY) == 0);
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/* Disable interrupts so that the test and the transmission are
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* atomic.
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*/
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flags = enter_critical_section();
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if ((getreg32(TMS570_CONSOLE_BASE + TMS570_SCI_FLR_OFFSET) &
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SCI_FLR_TXRDY) != 0)
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{
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/* Send the character */
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putreg32((uint32_t)ch, TMS570_CONSOLE_BASE + TMS570_SCI_TD_OFFSET);
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leave_critical_section(flags);
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return;
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}
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leave_critical_section(flags);
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}
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#endif
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}
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/****************************************************************************
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* Name: up_putc
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*
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* Description:
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* Provide priority, low-level access to support OS debug writes
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*
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****************************************************************************/
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int up_putc(int ch)
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{
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#ifdef HAVE_SERIAL_CONSOLE
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/* Check for LF */
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if (ch == '\n')
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{
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/* Add CR */
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arm_lowputc('\r');
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}
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arm_lowputc(ch);
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#endif
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return ch;
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}
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/****************************************************************************
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* Name: tms570_lowsetup
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*
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* Description:
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* This performs basic initialization of the SCI used for the serial
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* console. Its purpose is to get the console output available as soon
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* as possible.
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*
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****************************************************************************/
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void tms570_lowsetup(void)
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{
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#ifdef CONFIG_TMS570_SCI1
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/* Perform one-time SCI initialization */
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tms570_sci_initialize(TMS570_SCI1_BASE);
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#endif
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#ifdef CONFIG_TMS570_SCI2
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/* Perform one-time SCI initialization */
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tms570_sci_initialize(TMS570_SCI2_BASE);
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#endif
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#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_SCI_CONFIG)
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/* Configure the console (only) */
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tms570_sci_configure(TMS570_CONSOLE_BASE, &g_console_config);
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#endif
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}
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/****************************************************************************
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* Name: tms570_sci_configure
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*
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* Description:
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* Configure an SCI for non-interrupt driven operation
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*
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****************************************************************************/
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int tms570_sci_configure(uint32_t base,
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FAR const struct sci_config_s *config)
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{
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float divb7;
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uint32_t intpart;
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uint32_t p;
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uint32_t m;
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uint32_t u;
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uint32_t nbits;
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uint32_t regval;
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uint32_t gcr1;
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/* Pre-calculate the baudrate divisor with 7 bits of fraction
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*
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* The input clock to the baud rate generator is VCLK.
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* Asynchronous timing is assumed.
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*/
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divb7 = BOARD_VCLK_FREQUENCY / (config->baud * 16) ;
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/* Break out the integer and fractional parts */
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intpart = (uint32_t)divb7;
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/* Disable all interrupts and map them all to INT0 */
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putreg32(SCI_INT_ALLINTS, base + TMS570_SCI_CLEARINT_OFFSET);
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putreg32(SCI_INT_ALLINTS, base + TMS570_SCI_CLEARINTLVL_OFFSET);
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/* Global control 1:
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* COMM=0 Idle line mode is used.
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* TIMING=1 Asynchronous timing is used.
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* PARENA=? Depends on configuration settings
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* PARITY=? Depends on configuration settings
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* STOP=? Depends on configuration settings
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* CLOCK=1 The internal SCICLK is the clock source
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* LIN=0 LIN mode is disabled
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* SWRST=0 SCI is initiailized and held in reset state
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* SLEEP=0 Sleep mode is disabled
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* ADAPT=0 Automatic baud rate adjustment is disabled
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* MBUF=0 The multi-buffer mode is disabled.
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* CTYPE=0 Classic checksum is used.
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* HGEN=0 (Effective in LIN mode only)
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* STOPEXT=0 (Effective in LIN mode only)
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* LOOPBACK=0 Loop back mode is disabled
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* CONT=0 Freeze SCI when debug mode is entered
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* RXENA=1 Receiver is enabled
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* TXENA=1 Transmitter is enabled
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*/
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gcr1 = (SCI_GCR1_TIMING | SCI_GCR1_CLOCK |
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SCI_GCR1_RXENA | SCI_GCR1_TXENA);
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DEBUGASSERT(config->parity >= 0 && config->parity <= 2);
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if (config->parity == 1)
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{
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gcr1 |= SCI_GCR1_PARENA;
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}
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else if (config->parity == 2)
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{
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gcr1 |= (SCI_GCR1_PARENA | SCI_GCR1_PARITY);
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}
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if (config->stopbits2)
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{
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gcr1 |= SCI_GCR1_STOP;
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}
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gcr1 = 0;
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gcr1 = (SCI_GCR1_TIMING | SCI_GCR1_CLOCK |
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SCI_GCR1_RXENA | SCI_GCR1_TXENA);
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putreg32(gcr1, base + TMS570_SCI_GCR1_OFFSET);
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p = (uint32_t)intpart - 1;
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m = (divb7 - intpart) * 16;
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u = 0;
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regval = SCI_BRS_P(p) | SCI_BRS_M(m) | SCI_BRS_U(u);
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putreg32(regval, base + TMS570_SCI_BRS_OFFSET);
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/* Transmission length */
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nbits = config->bits;
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DEBUGASSERT(nbits >= 1 && nbits <= 8);
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if (nbits < 1)
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{
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nbits = 1;
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}
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else if (nbits > 8)
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{
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nbits = 8;
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}
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regval = SCI_FORMAT_CHAR(nbits - 1);
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putreg32(regval, base + TMS570_SCI_FORMAT_OFFSET);
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/* Put the SCI in its operational state. */
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gcr1 |= SCI_GCR1_SWRST;
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putreg32(gcr1, base + TMS570_SCI_GCR1_OFFSET);
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return OK;
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}
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