7a9457bb07
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
109 lines
5.3 KiB
C
109 lines
5.3 KiB
C
/************************************************************************************
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* dm320/dm320_timer.h
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*
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* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __DM320_TIMER_H
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#define __DM320_TIMER_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Timer Registers */
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#define DM320_TIMER0_TMMD (DM320_PERIPHERALS_VADDR + 0x0000) /* Timer 0 Mode */
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#define DM320_TIMER0_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0004) /* Timer 0 Prescalar */
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#define DM320_TIMER0_TMDIV (DM320_PERIPHERALS_VADDR + 0x0006) /* Timer 0 Divisor (count) */
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#define DM320_TIMER0_TMTRG (DM320_PERIPHERALS_VADDR + 0x0008) /* Timer 0 One-Shot Trigger */
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#define DM320_TIMER0_TMCNT (DM320_PERIPHERALS_VADDR + 0x000A) /* Timer 0 Count */
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#define DM320_TIMER1_TMMD (DM320_PERIPHERALS_VADDR + 0x0080) /* Timer 1 Mode */
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#define DM320_TIMER1_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0084) /* Timer 1 Prescalar */
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#define DM320_TIMER1_TMDIV (DM320_PERIPHERALS_VADDR + 0x0086) /* Timer 1 Divisor (count) */
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#define DM320_TIMER1_TMTRG (DM320_PERIPHERALS_VADDR + 0x0088) /* Timer 1 One-Shot Trigger */
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#define DM320_TIMER1_TMCNT (DM320_PERIPHERALS_VADDR + 0x008A) /* Timer 1 Count */
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#define DM320_TIMER2_TMMD (DM320_PERIPHERALS_VADDR + 0x0100) /* Timer 2 Mode */
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#define DM320_TIMER2_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0104) /* Timer 2 Prescalar */
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#define DM320_TIMER2_TMDIV (DM320_PERIPHERALS_VADDR + 0x0106) /* Timer 2 Divisor (count) */
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#define DM320_TIMER2_TMTRG (DM320_PERIPHERALS_VADDR + 0x0108) /* Timer 2 One-Shot Trigger */
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#define DM320_TIMER2_TMCNT (DM320_PERIPHERALS_VADDR + 0x010A) /* Timer 2 Count */
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#define DM320_TIMER3_TMMD (DM320_PERIPHERALS_VADDR + 0x0180) /* Timer 2 Mode */
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#define DM320_TIMER3_TMPRSCL (DM320_PERIPHERALS_VADDR + 0x0184) /* Timer 2 Prescalar */
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#define DM320_TIMER3_TMDIV (DM320_PERIPHERALS_VADDR + 0x0186) /* Timer 2 Divisor (count) */
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#define DM320_TIMER3_TMTRG (DM320_PERIPHERALS_VADDR + 0x0188) /* Timer 2 One-Shot Trigger */
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#define DM320_TIMER3_TMCNT (DM320_PERIPHERALS_VADDR + 0x018A) /* Timer 2 Count */
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/* Timer 0,1,2,3 Mode Register Bits: */
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#define DM320_TMR_MODE_TEST_MASK 0x00fc /* Bits 7:2=Test */
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#define DM320_TMR_MODE_MODE_MASK 0x0003 /* Bits 1:0=timer mode */
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# define DM320_TMR_MODE_STOP 0x0000 /* Stop Timer */
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# define DM320_TMR_MODE_ONESHOT 0x0001 /* Start one-shot timer */
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# define DM320_TMR_MODE_FREERUN 0x0002 /* Start free-running timer */
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/* Timer 0,1,2,3 Clock Select Register Bits: */
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#define DM320_TMR_PRSCL_MASK 0x03ff /* Bits 0:9=Timer prescale value */
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/* Timer 0,1,2,3 Clock Divisor (Count) Register Bits: */
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#define DM320_TMR_DIV_MASK 0xffff /* Bits 0:15=Timer divisor value */
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/* Timer 0,1,2,3 Timer One-Short Trigger Register Bits: */
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#define DM320_TMR_TMTRG_MASK 0x0001 /* Bit 0=One short trigger */
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# define DM320_TMR_TMTRG_START 0x0001 /* 1 starts one shot timer */
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/* Timer 0,1,2,3 Timer Counter Register Bits: */
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#define DM320_TMR_COUNT_MASK 0xffff /* Bits 0:15=Current counter value */
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#endif
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#endif /* __DM320_TIMER_H */
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