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addrenv.h
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arm_addrenv_kstack.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_addrenv_shm.c
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Replace all occurrences of vdbg with vinfo
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2016-06-11 11:59:51 -06:00 |
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arm_addrenv_ustack.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_addrenv_utils.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_addrenv.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_allocpage.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_assert.c
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New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting.
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2016-06-14 09:07:53 -06:00 |
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arm_blocktask.c
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arm_checkmapping.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_coherent_dcache.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_copyarmstate.c
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arm_copyfullstate.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_cpuhead.S
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ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently
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2016-05-13 11:39:42 -06:00 |
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arm_cpuidlestack.c
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ARMv7-A SMP: Allow CONFIG_SMP_NCPUS=1 for testing purposes
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2016-05-18 09:17:02 -06:00 |
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arm_cpuindex.c
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ARM: Remove some obsolete and incorrect conditional compilation
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2016-03-11 12:42:58 -06:00 |
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arm_cpupause.c
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Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake.
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2016-03-12 15:22:45 -06:00 |
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arm_cpustart.c
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Rename *lldbg to *llerr
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2016-06-11 14:55:27 -06:00 |
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arm_dataabort.c
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New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting.
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2016-06-14 09:07:53 -06:00 |
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arm_doirq.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_elf.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_fpuconfig.S
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arm_fullcontextrestore.S
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_gicv2_dump.c
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ARMv7-A GIC: Fix some initialization errors
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2016-04-01 08:40:51 -06:00 |
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arm_gicv2.c
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Replace all occurrences of vdbg with vinfo
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2016-06-11 11:59:51 -06:00 |
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arm_head.S
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Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES
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2016-06-11 14:14:08 -06:00 |
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arm_initialstate.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_l2cc_pl310.c
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Rename *lldbg to *llerr
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2016-06-11 14:55:27 -06:00 |
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arm_memcpy.S
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arm_mmu.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_pgalloc.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_pghead.S
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Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES
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2016-06-11 14:14:08 -06:00 |
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arm_pginitialize.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_physpgaddr.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_prefetchabort.c
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New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting.
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2016-06-14 09:07:53 -06:00 |
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arm_releasepending.c
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Rename *lldbg to *llerr
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2016-06-11 14:55:27 -06:00 |
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arm_reprioritizertr.c
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Rename *lldbg to *llerr
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2016-06-11 14:55:27 -06:00 |
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arm_restorefpu.S
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Cosmetic changes from review of last PR
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2016-04-18 06:50:45 -06:00 |
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arm_savefpu.S
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arm_saveusercontext.S
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Cosmetic changes from review of last PR
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2016-04-18 06:50:45 -06:00 |
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arm_schedulesigaction.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_sigdeliver.c
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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arm_signal_dispatch.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_syscall.c
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New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting.
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2016-06-14 09:07:53 -06:00 |
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arm_testset.S
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arm_unblocktask.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_undefinedinsn.c
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New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting.
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2016-06-14 09:07:53 -06:00 |
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arm_va2pte.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_vectoraddrexcptn.S
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arm_vectors.S
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm_vectortab.S
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arm_vfork.S
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arm_virtpgaddr.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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arm.h
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cache.h
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cp15_cacheops.h
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cp15_clean_dcache.S
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cp15_coherent_dcache.S
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cp15_flush_dcache.S
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cp15_invalidate_dcache_all.S
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cp15_invalidate_dcache.S
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cp15.h
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crt0.c
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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fpu.h
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gic.h
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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gtm.h
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Kconfig
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Make it clear that GIC support is GICv2
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2016-03-14 10:50:54 -06:00 |
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l2cc_pl310.h
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l2cc.h
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mmu.h
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mpcore.h
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pgalloc.h
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sctlr.h
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Update some ARM registers for Cortex-A9
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2016-03-29 11:47:35 -06:00 |
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smp.h
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ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently
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2016-05-13 11:39:42 -06:00 |
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svcall.h
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Toolchain.defs
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