c6c36e1e65
Fix nxstyle errors to pass CI Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
266 lines
7.9 KiB
C
266 lines
7.9 KiB
C
/****************************************************************************
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* arch/arm/src/stm32/stm32_pwr.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_PWR_H
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#define __ARCH_ARM_SRC_STM32_STM32_PWR_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include "chip.h"
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#include "hardware/stm32_pwr.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* Identify MCU-specific wakeup pin.
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* Different STM32 parts support differing numbers of wakeup pins.
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*/
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enum stm32_pwr_wupin_e
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{
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PWR_WUPIN_1 = 0, /* Wake-up pin 1 (all parts) */
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PWR_WUPIN_2, /* Wake-up pin 2 */
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PWR_WUPIN_3 /* Wake-up pin 3 */
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_pwr_enablesdadc
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*
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* Description:
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* Enables SDADC power
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*
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* Input Parameters:
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* sdadc - SDADC number 1-3
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#if defined(CONFIG_STM32_STM32F37XX)
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void stm32_pwr_enablesdadc(uint8_t sdadc);
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#endif
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/****************************************************************************
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* Name: stm32_pwr_initbkp
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*
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* Description:
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* Insures the referenced count access to the backup domain
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* (RTC registers, RTC backup data registers and backup SRAM is consistent
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* with the HW state without relying on a variable.
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*
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* NOTE: This function should only be called by SoC Start up code.
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*
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* Input Parameters:
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* writable - set the initial state of the enable and the
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* bkp_writable_counter
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_pwr_initbkp(bool writable);
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/****************************************************************************
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* Name: stm32_pwr_enablebkp
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*
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* Description:
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* Enables access to the backup domain
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* (RTC registers, RTC backup data registers and backup SRAM).
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*
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* NOTE:
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* Reference counting is used in order to supported nested calls to this
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* function. As a consequence, every call to stm32_pwr_enablebkp(true)
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* must be followed by a matching call to stm32_pwr_enablebkp(false).
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*
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* Input Parameters:
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* writable - True: enable ability to write to backup domain registers
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_pwr_enablebkp(bool writable);
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/****************************************************************************
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* Name: stm32_pwr_enablewkup
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*
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* Description:
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* Enables the WKUP pin.
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*
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* Input Parameters:
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* wupin - Selects the WKUP pin to enable/disable
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* wupon - state to set it to
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*
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* Returned Value:
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* Zero (OK) is returned on success; A negated errno value is returned on
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* any failure. The only cause of failure is if the selected MCU does not
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* support the requested wakeup pin.
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*
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****************************************************************************/
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int stm32_pwr_enablewkup(enum stm32_pwr_wupin_e wupin, bool wupon);
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/****************************************************************************
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* Name: stm32_pwr_getsbf
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*
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* Description:
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* Return the standby flag.
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*
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****************************************************************************/
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bool stm32_pwr_getsbf(void);
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/****************************************************************************
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* Name: stm32_pwr_getwuf
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*
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* Description:
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* Return the wakeup flag.
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*
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****************************************************************************/
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bool stm32_pwr_getwuf(void);
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/****************************************************************************
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* Name: stm32_pwr_enablebreg
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*
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* Description:
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* Enables the Backup regulator, the Backup regulator (used to maintain
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* backup SRAM content in Standby and VBAT modes) is enabled. If BRE is
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* reset, the backup regulator is switched off. The backup SRAM can still
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* be used but its content will be lost in the Standby and VBAT modes.
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* Once set, the application must wait that the Backup Regulator Ready flag
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* (BRR) is set to indicate that the data written into the RAM will be
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* maintained in the Standby and VBAT modes.
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*
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* Input Parameters:
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* region - state to set it to
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
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void stm32_pwr_enablebreg(bool region);
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#else
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# define stm32_pwr_enablebreg(region)
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#endif
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/****************************************************************************
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* Name: stm32_pwr_setvos
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*
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* Description:
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* Set voltage scaling for EnergyLite devices.
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*
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* Input Parameters:
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* vos - Properly aligned voltage scaling select bits for the PWR_CR
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* register.
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* At present, this function is called only from initialization logic.
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* If used for any other purpose that protection to assure that its
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* operation is atomic will be required.
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*
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****************************************************************************/
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#ifdef CONFIG_STM32_ENERGYLITE
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void stm32_pwr_setvos(uint16_t vos);
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/****************************************************************************
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* Name: stm32_pwr_setpvd
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*
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* Description:
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* Sets power voltage detector for EnergyLite devices.
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*
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* Input Parameters:
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* pls - PVD level
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* At present, this function is called only from initialization logic.
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*
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****************************************************************************/
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void stm32_pwr_setpvd(uint16_t pls);
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/****************************************************************************
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* Name: stm32_pwr_enablepvd
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*
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* Description:
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* Enable the Programmable Voltage Detector
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*
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****************************************************************************/
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void stm32_pwr_enablepvd(void);
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/****************************************************************************
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* Name: stm32_pwr_disablepvd
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*
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* Description:
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* Disable the Programmable Voltage Detector
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*
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****************************************************************************/
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void stm32_pwr_disablepvd(void);
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#endif /* CONFIG_STM32_ENERGYLITE */
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32_STM32_PWR_H */
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