b4a33b5ec0
Uros Platise has submitted the ICLA and we can migrate the licenses to Apache. David Sidrane has submitted the ICLA and we can migrate the licenses to Apache. Bob Feretich has submitted the ICLA and we can migrate the licenses to Apache. Gregory Nutt has submitted the SGA and we can migrate the licenses to Apache. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
220 lines
6.8 KiB
C
220 lines
6.8 KiB
C
/****************************************************************************
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* arch/arm/src/stm32/stm32_tim.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_TIM_H
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#define __ARCH_ARM_SRC_STM32_STM32_TIM_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "hardware/stm32_tim.h"
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#include <nuttx/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Helpers ******************************************************************/
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#define STM32_TIM_SETMODE(d,mode) ((d)->ops->setmode(d,mode))
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#define STM32_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq))
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#define STM32_TIM_SETPERIOD(d,period) ((d)->ops->setperiod(d,period))
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#define STM32_TIM_GETCOUNTER(d) ((d)->ops->getcounter(d))
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#define STM32_TIM_SETCOUNTER(d,c) ((d)->ops->setcounter(d,c))
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#define STM32_TIM_GETWIDTH(d) ((d)->ops->getwidth(d))
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#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
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#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
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#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
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#define STM32_TIM_SETISR(d,hnd,arg,s) ((d)->ops->setisr(d,hnd,arg,s))
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#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
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#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
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#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
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#define STM32_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/* TIM Device Structure */
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struct stm32_tim_dev_s
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{
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struct stm32_tim_ops_s *ops;
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};
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/* TIM Modes of Operation */
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typedef enum
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{
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STM32_TIM_MODE_UNUSED = -1,
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/* One of the following */
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STM32_TIM_MODE_MASK = 0x0310,
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STM32_TIM_MODE_DISABLED = 0x0000,
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STM32_TIM_MODE_UP = 0x0100,
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STM32_TIM_MODE_DOWN = 0x0110,
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STM32_TIM_MODE_UPDOWN = 0x0200,
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STM32_TIM_MODE_PULSE = 0x0300,
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/* One of the following */
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STM32_TIM_MODE_CK_INT = 0x0000,
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/* STM32_TIM_MODE_CK_INT_TRIG = 0x0400, */
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/* STM32_TIM_MODE_CK_EXT = 0x0800, */
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/* STM32_TIM_MODE_CK_EXT_TRIG = 0x0C00, */
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/* Clock sources, OR'ed with CK_EXT */
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/* STM32_TIM_MODE_CK_CHINVALID = 0x0000, */
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/* STM32_TIM_MODE_CK_CH1 = 0x0001, */
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/* STM32_TIM_MODE_CK_CH2 = 0x0002, */
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/* STM32_TIM_MODE_CK_CH3 = 0x0003, */
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/* STM32_TIM_MODE_CK_CH4 = 0x0004 */
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/* Todo: external trigger block */
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} stm32_tim_mode_t;
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/* TIM Channel Modes */
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typedef enum
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{
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STM32_TIM_CH_DISABLED = 0x00,
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/* Common configuration */
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STM32_TIM_CH_POLARITY_POS = 0x00,
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STM32_TIM_CH_POLARITY_NEG = 0x01,
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/* MODES: */
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STM32_TIM_CH_MODE_MASK = 0x06,
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/* Output Compare Modes */
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STM32_TIM_CH_OUTPWM = 0x04, /* Enable standard PWM mode, active high when counter < compare */
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/* STM32_TIM_CH_OUTCOMPARE = 0x06, */
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/* TODO other modes ... as PWM capture, ENCODER and Hall Sensor */
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/* STM32_TIM_CH_INCAPTURE = 0x10, */
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/* STM32_TIM_CH_INPWM = 0x20 */
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/* STM32_TIM_CH_DRIVE_OC -- open collector mode */
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} stm32_tim_channel_t;
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/* TIM Operations */
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struct stm32_tim_ops_s
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{
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/* Basic Timers */
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int (*setmode)(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
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int (*setclock)(FAR struct stm32_tim_dev_s *dev, uint32_t freq);
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void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint32_t period);
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uint32_t (*getcounter)(FAR struct stm32_tim_dev_s *dev);
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void (*setcounter)(FAR struct stm32_tim_dev_s *dev, uint32_t count);
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/* General and Advanced Timers Adds */
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int (*getwidth)(FAR struct stm32_tim_dev_s *dev);
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int (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
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stm32_tim_channel_t mode);
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int (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel,
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uint32_t compare);
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int (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel);
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/* Timer interrupts */
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int (*setisr)(FAR struct stm32_tim_dev_s *dev,
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xcpt_t handler, void * arg, int source);
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void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source);
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void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source);
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void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source);
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int (*checkint)(FAR struct stm32_tim_dev_s *dev, int source);
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};
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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/* Power-up timer and get its structure */
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FAR struct stm32_tim_dev_s *stm32_tim_init(int timer);
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/* Power-down timer, mark it as unused */
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int stm32_tim_deinit(FAR struct stm32_tim_dev_s *dev);
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/****************************************************************************
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* Name: stm32_timer_initialize
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*
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* Description:
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* Bind the configuration timer to a timer lower half instance and
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* register the timer drivers at 'devpath'
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*
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* Input Parameters:
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* devpath - The full path to the timer device.
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* This should be of the form /dev/timer0
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* timer - the timer number.
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*
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* Returned Value:
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* Zero (OK) is returned on success; A negated errno value is returned
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* to indicate the nature of any failure.
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*
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****************************************************************************/
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#ifdef CONFIG_TIMER
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int stm32_timer_initialize(FAR const char *devpath, int timer);
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32_STM32_TIM_H */
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