nuttx/libs/libc/machine
Ville Juven 9288ed85e7 RISC-V: Add/fix implementation for arch_elf.c
The jump instruction relocation had an assert that tests for jumps with
an offset of 0. This makes it so that a while(1); statement causes an
assert because the jump instruction points to the same address, which
is perfectly legal.

Addend was not handled correctly in several reloc types.

Add ADD32/64 + SUB32/64 relocations, for some reason the compiler
I use likes to add them.
2022-03-23 17:56:54 +08:00
..
arm arch/arm: Support setjmp/longjmp for all socs 2022-03-09 17:13:21 +02:00
renesas Kconfig: add quotes in source to clean warnings from setconfig 2021-07-23 02:32:19 -07:00
risc-v RISC-V: Add/fix implementation for arch_elf.c 2022-03-23 17:56:54 +08:00
sim sim: Initial support on MacOS M1 and Linux AARCH64 based hosts. 2022-02-17 09:35:09 +08:00
sparc port nuttx to sparc-v8 commit 2022-01-17 09:09:29 -03:00
x86 libs: Gregory Nutt: update licenses to Apache 2021-04-02 11:12:25 -05:00
xtensa libc:machine:xtensa: fix warning 2022-02-24 22:13:46 +08:00
arch_atomic.c arch:lib_atomic: remove and fix gcc warning declaration-mismatch 2022-03-18 13:35:42 +08:00
Kconfig port nuttx to sparc-v8 commit 2022-01-17 09:09:29 -03:00
Make.defs port nuttx to sparc-v8 commit 2022-01-17 09:09:29 -03:00