293 lines
10 KiB
C
293 lines
10 KiB
C
/****************************************************************************
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* arch/arm/src/stm32f7/stm32_config.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F7_STM32_CONFIG_H
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#define __ARCH_ARM_SRC_STM32F7_STM32_CONFIG_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/chip/chip.h>
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* GPIO IRQs ****************************************************************/
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#ifndef CONFIG_STM32F7_GPIO_IRQ
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# undef CONFIG_STM32F7_GPIOA_IRQ
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# undef CONFIG_STM32F7_GPIOB_IRQ
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# undef CONFIG_STM32F7_GPIOC_IRQ
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# undef CONFIG_STM32F7_GPIOD_IRQ
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# undef CONFIG_STM32F7_GPIOE_IRQ
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#endif
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#if STM32F7_NPORTS < 1
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# undef CONFIG_STM32F7_GPIOA_IRQ
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#endif
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#if STM32F7_NPORTS < 2
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# undef CONFIG_STM32F7_GPIOB_IRQ
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#endif
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#if STM32F7_NPORTS < 3
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# undef CONFIG_STM32F7_GPIOC_IRQ
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#endif
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#if STM32F7_NPORTS < 4
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# undef CONFIG_STM32F7_GPIOD_IRQ
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#endif
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#if STM32F7_NPORTS < 5
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# undef CONFIG_STM32F7_GPIOE_IRQ
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#endif
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/* UARTs ********************************************************************/
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/* Don't enable UARTs not supported by the chip. */
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#if STM32F7_NUART < 1
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# undef CONFIG_STM32F7_UART0
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# undef CONFIG_STM32F7_UART1
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# undef CONFIG_STM32F7_UART2
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# undef CONFIG_STM32F7_UART3
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# undef CONFIG_STM32F7_UART4
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#elif STM32F7_NUART < 2
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# undef CONFIG_STM32F7_UART1
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# undef CONFIG_STM32F7_UART2
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# undef CONFIG_STM32F7_UART3
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# undef CONFIG_STM32F7_UART4
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#elif STM32F7_NUART < 3
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# undef CONFIG_STM32F7_UART2
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# undef CONFIG_STM32F7_UART3
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# undef CONFIG_STM32F7_UART4
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#elif STM32F7_NUART < 4
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# undef CONFIG_STM32F7_UART3
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# undef CONFIG_STM32F7_UART4
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#elif STM32F7_NUART < 5
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# undef CONFIG_STM32F7_UART4
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#endif
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/* Are any UARTs enabled? */
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#undef HAVE_UART_DEVICE
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#if defined(CONFIG_STM32F7_UART0) || defined(CONFIG_STM32F7_UART1) || \
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defined(CONFIG_STM32F7_UART2) || defined(CONFIG_STM32F7_UART3) || \
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defined(CONFIG_STM32F7_UART4)
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# define HAVE_UART_DEVICE 1
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#endif
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/* USARTs *******************************************************************/
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/* If the USART is not being used as a UART, then it really isn't enabled
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* for our purposes.
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*/
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#ifndef CONFIG_USART0_SERIALDRIVER
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# undef CONFIG_STM32F7_USART0
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#endif
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#ifndef CONFIG_USART1_SERIALDRIVER
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# undef CONFIG_STM32F7_USART1
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#endif
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#ifndef CONFIG_USART2_SERIALDRIVER
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# undef CONFIG_STM32F7_USART2
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#endif
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/* Don't enable USARTs not supported by the chip. */
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#if STM32F7_NUSART < 1
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# undef CONFIG_STM32F7_USART0
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# undef CONFIG_STM32F7_USART1
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# undef CONFIG_STM32F7_USART2
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#elif STM32F7_NUSART < 2
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# undef CONFIG_STM32F7_USART1
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# undef CONFIG_STM32F7_USART2
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#elif STM32F7_NUSART < 3
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# undef CONFIG_STM32F7_USART2
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#endif
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/* Are any USARTs enabled? */
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#if defined(CONFIG_STM32F7_USART0) || defined(CONFIG_STM32F7_USART1) || \
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defined(CONFIG_STM32F7_USART2)
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# undef HAVE_UART_DEVICE
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# define HAVE_UART_DEVICE 1
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#endif
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/* UART Flow Control ********************************************************/
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/* UARTs do not support flow control */
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#undef CONFIG_UART0_IFLOWCONTROL
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#undef CONFIG_UART1_IFLOWCONTROL
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#undef CONFIG_UART2_IFLOWCONTROL
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#undef CONFIG_UART3_IFLOWCONTROL
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#undef CONFIG_UART4_IFLOWCONTROL
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/* Hardware flow control requires using DMAC channel (not yet supported) */
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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# warning PDC or DMAC support is required for RTS hardware flow control
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# undef CONFIG_SERIAL_IFLOWCONTROL
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# undef CONFIG_USART0_IFLOWCONTROL
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# undef CONFIG_USART1_IFLOWCONTROL
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# undef CONFIG_USART2_IFLOWCONTROL
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#endif
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/* Serial Console ***********************************************************/
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/* Is there a serial console? There should be no more than one defined. It
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* could be on any UARTn, n=1,..,STM32F7_NUART, or USARTn, n=1,.., STM32F7_NUSART
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*/
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#undef HAVE_SERIAL_CONSOLE
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART0)
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART3)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART4)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART0)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#else
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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#endif
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/* SPI ******************************************************************************/
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/* Don't enable SPI peripherals not supported by the chip. */
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#if CHIP_NSPI < 1
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# undef CONFIG_STM32F7_SPI0
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# undef CONFIG_STM32F7_SPI1
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#elif CHIP_NSPI < 2
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# undef CONFIG_STM32F7_SPI1
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#endif
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#ifndef CONFIG_STM32F7_HAVE_SPI
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# undef CONFIG_STM32F7_SPI0
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# undef CONFIG_STM32F7_SPI1
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#endif
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/* Are any SPI peripherals enabled? */
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#if !defined(CONFIG_STM32F7_SPI0) && !defined(CONFIG_STM32F7_SPI0)
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# undef CONFIG_STM32F7_HAVE_SPI
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_STM32F7_STM32_CONFIG_H */
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