d7c53aa6e4
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5774 42af7a65-404d-4744-a932-0658087f49c3
251 lines
7.3 KiB
C
251 lines
7.3 KiB
C
/****************************************************************************
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* arch/arm/src/stm32/stm32_start.c
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* arch/arm/src/chip/stm32_start.c
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*
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* Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/init.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "stm32.h"
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#include "stm32_gpio.h"
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#include "stm32_userspace.h"
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#ifdef CONFIG_ARCH_FPU
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# include "nvic.h"
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: showprogress
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*
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* Description:
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* Print a character on the UART to show boot status.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG
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# define showprogress(c) up_lowputc(c)
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#else
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# define showprogress(c)
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#endif
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/****************************************************************************
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* Name: stm32_fpuconfig
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*
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* Description:
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* Configure the FPU. Relative bit settings:
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*
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* CPACR: Enables access to CP10 and CP11
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* CONTROL.FPCA: Determines whether the FP extension is active in the
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* current context:
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* FPCCR.ASPEN: Enables automatic FP state preservation, then the
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* processor sets this bit to 1 on successful completion of any FP
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* instruction.
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* FPCCR.LSPEN: Enables lazy context save of FP state. When this is
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* done, the processor reserves space on the stack for the FP state,
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* but does not save that state information to the stack.
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*
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* Software must not change the value of the ASPEN bit or LSPEN bit while either:
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* - the CPACR permits access to CP10 and CP11, that give access to the FP
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* extension, or
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* - the CONTROL.FPCA bit is set to 1
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*
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****************************************************************************/
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#ifdef CONFIG_ARCH_FPU
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#ifdef CONFIG_ARMV7M_CMNVECTOR
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static inline void stm32_fpuconfig(void)
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{
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uint32_t regval;
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/* Set CONTROL.FPCA so that we always get the extended context frame
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* with the volatile FP registers stacked above the basic context.
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*/
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regval = getcontrol();
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regval |= (1 << 2);
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setcontrol(regval);
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/* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
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* with the lazy FP context save behaviour. Clear FPCCR.ASPEN since we
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* are going to turn on CONTROL.FPCA for all contexts.
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*/
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regval = getreg32(NVIC_FPCCR);
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regval &= ~((1 << 31) | (1 << 30));
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putreg32(regval, NVIC_FPCCR);
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/* Enable full access to CP10 and CP11 */
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regval = getreg32(NVIC_CPACR);
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regval |= ((3 << (2*10)) | (3 << (2*11)));
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putreg32(regval, NVIC_CPACR);
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}
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#else
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static inline void stm32_fpuconfig(void)
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{
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uint32_t regval;
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/* Clear CONTROL.FPCA so that we do not get the extended context frame
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* with the volatile FP registers stacked in the saved context.
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*/
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regval = getcontrol();
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regval &= ~(1 << 2);
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setcontrol(regval);
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/* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
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* with the lazy FP context save behaviour. Clear FPCCR.ASPEN since we
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* are going to keep CONTROL.FPCA off for all contexts.
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*/
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regval = getreg32(NVIC_FPCCR);
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regval &= ~((1 << 31) | (1 << 30));
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putreg32(regval, NVIC_FPCCR);
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/* Enable full access to CP10 and CP11 */
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regval = getreg32(NVIC_CPACR);
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regval |= ((3 << (2*10)) | (3 << (2*11)));
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putreg32(regval, NVIC_CPACR);
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}
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#endif
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#else
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# define stm32_fpuconfig()
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: _start
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*
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* Description:
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* This is the reset entry point.
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*
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****************************************************************************/
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void __start(void)
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{
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const uint32_t *src;
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uint32_t *dest;
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/* Configure the uart so that we can get debug output as soon as possible */
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stm32_clockconfig();
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stm32_fpuconfig();
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stm32_lowsetup();
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stm32_gpioinit();
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showprogress('A');
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/* Clear .bss. We'll do this inline (vs. calling memset) just to be
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* certain that there are no issues with the state of global variables.
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*/
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for (dest = &_sbss; dest < &_ebss; )
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{
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*dest++ = 0;
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}
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showprogress('B');
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/* Move the intialized data section from his temporary holding spot in
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* FLASH into the correct place in SRAM. The correct place in SRAM is
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* give by _sdata and _edata. The temporary location is in FLASH at the
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* end of all of the other read-only data (.text, .rodata) at _eronly.
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*/
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for (src = &_eronly, dest = &_sdata; dest < &_edata; )
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{
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*dest++ = *src++;
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}
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showprogress('C');
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/* Perform early serial initialization */
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#ifdef USE_EARLYSERIALINIT
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up_earlyserialinit();
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#endif
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showprogress('D');
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/* For the case of the separate user-/kernel-space build, perform whatever
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* platform specific initialization of the user memory is required.
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* Normally this just means initializing the user space .data and .bss
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* segments.
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*/
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#ifdef CONFIG_NUTTX_KERNEL
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stm32_userspace();
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showprogress('E');
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#endif
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/* Initialize onboard resources */
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stm32_boardinitialize();
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showprogress('F');
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/* Then start NuttX */
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showprogress('\r');
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showprogress('\n');
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os_start();
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/* Shoulnd't get here */
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for(;;);
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}
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