037c9ea0a4
Summary The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_. This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them: up_arch.h up_internal.h up_vfork.h The only change to the files is from including up_arch.h to arm_arch.h (for example). The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm. Impact There should be not impact of this change (other that one step toward more consistent naming). Testing stm32f4discovery:netnsh
277 lines
11 KiB
C
277 lines
11 KiB
C
/************************************************************************************
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* arch/arm/src/s32k1xx/s32k1xx_preriphclocks.h
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Some of the definitions within this file derive from NXP sample code for
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* the S32K1xx MCUs. That sample code has this licensing information:
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*
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* Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2018 NXP
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* All rights reserved.
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*
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* THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_S32K1XX_S32K1XX_PERIPHCLOCKS_H
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#define __ARCH_ARM_SRC_S32K1XX_S32K1XX_PERIPHCLOCKS_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include "arm_arch.h"
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#include "arm_internal.h"
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#include "s32k1xx_config.h"
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#if defined(CONFIG_ARCH_CHIP_S32K11X)
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# include "s32k11x/s32k11x_clocknames.h"
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#elif defined(CONFIG_ARCH_CHIP_S32K14X)
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# include "s32k14x/s32k14x_clocknames.h"
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#endif
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Values for peripheral_clock_source_t. An enumeration is not appropriate
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* because some of the values are duplicates.
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*/
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#define CLK_SRC_OFF 0 /* Clock is off */
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#define CLK_SRC_SOSC 1 /* OSCCLK - System Oscillator Bus Clock */
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#define CLK_SRC_SIRC 2 /* SCGIRCLK - Slow IRC Clock */
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#define CLK_SRC_FIRC 3 /* SCGFIRCLK - Fast IRC Clock */
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#define CLK_SRC_SPLL 6 /* SCGPCLK System PLL clock */
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#define CLK_SRC_SOSC_DIV1 1 /* OSCCLK - System Oscillator Bus Clock */
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#define CLK_SRC_SIRC_DIV1 2 /* SCGIRCLK - Slow IRC Clock */
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#define CLK_SRC_FIRC_DIV1 3 /* SCGFIRCLK - Fast IRC Clock */
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#define CLK_SRC_SPLL_DIV1 6 /* SCGPCLK System PLL clock */
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#define CLK_SRC_SOSC_DIV2 1 /* OSCCLK - System Oscillator Bus Clock */
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#define CLK_SRC_SIRC_DIV2 2 /* SCGIRCLK - Slow IRC Clock */
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#define CLK_SRC_FIRC_DIV2 3 /* SCGFIRCLK - Fast IRC Clock */
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#define CLK_SRC_SPLL_DIV2 6 /* SCGPCLK System PLL clock */
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/* PCC index offsets (all S32K1xx families). These are used in in the
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* family-specific mapping table g_clkname_mapping[] that is used to map a
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* clock name to a PCC control register index.
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*/
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#define PCC_INVALID_INDEX 0
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#define PCC_FTFC_INDEX 32
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#define PCC_DMAMUX_INDEX 33
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#define PCC_FLEXCAN0_INDEX 36
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#define PCC_FLEXCAN1_INDEX 37
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#define PCC_FTM3_INDEX 38
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#define PCC_ADC1_INDEX 39
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#define PCC_FLEXCAN2_INDEX 43
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#define PCC_LPSPI0_INDEX 44
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#define PCC_LPSPI1_INDEX 45
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#define PCC_LPSPI2_INDEX 46
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#define PCC_PDB1_INDEX 49
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#define PCC_CRC_INDEX 50
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#define PCC_PDB0_INDEX 54
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#define PCC_LPIT_INDEX 55
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#define PCC_FTM0_INDEX 56
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#define PCC_FTM1_INDEX 57
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#define PCC_FTM2_INDEX 58
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#define PCC_ADC0_INDEX 59
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#define PCC_RTC_INDEX 61
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#define PCC_CMU0_INDEX 62
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#define PCC_CMU1_INDEX 63
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#define PCC_LPTMR0_INDEX 64
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#define PCC_PORTA_INDEX 73
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#define PCC_PORTB_INDEX 74
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#define PCC_PORTC_INDEX 75
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#define PCC_PORTD_INDEX 76
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#define PCC_PORTE_INDEX 77
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#define PCC_SAI0_INDEX 84
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#define PCC_SAI1_INDEX 85
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#define PCC_FLEXIO_INDEX 90
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#define PCC_EWM_INDEX 97
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#define PCC_LPI2C0_INDEX 102
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#define PCC_LPI2C1_INDEX 103
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#define PCC_LPUART0_INDEX 106
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#define PCC_LPUART1_INDEX 107
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#define PCC_LPUART2_INDEX 108
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#define PCC_FTM4_INDEX 110
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#define PCC_FTM5_INDEX 111
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#define PCC_FTM6_INDEX 112
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#define PCC_FTM7_INDEX 113
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#define PCC_CMP0_INDEX 115
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#define PCC_QSPI_INDEX 118
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#define PCC_ENET_INDEX 121
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/* Peripheral instance features. */
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#define NO_PERIPHERAL_FEATURE (0) /* No peripheral feature */
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#define HAS_CLOCK_GATING_IN_SIM (1 << 0) /* Clock gating implemented in SIM */
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#define HAS_MULTIPLIER (1 << 1) /* Multiplier implemented in PCC */
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#define HAS_DIVIDER (1 << 2) /* Divider implemented in PCC */
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#define HAS_PROTOCOL_CLOCK_FROM_ASYNC1 (1 << 3) /* Clock source provided by first asynch clock */
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#define HAS_PROTOCOL_CLOCK_FROM_ASYNC2 (1 << 4) /* Clock source iprovided by second asynch clock */
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#define HAS_INT_CLOCK_FROM_BUS_CLOCK (1 << 5) /* Clock is provided by the bus clock */
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#define HAS_INT_CLOCK_FROM_SYS_CLOCK (1 << 6) /* Clock is provided by the sys clock */
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#define HAS_INT_CLOCK_FROM_SLOW_CLOCK (1 << 7) /* Clock is provided by the slow clock */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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typedef uint8_t peripheral_clock_source_t; /* See CLK_SRC_* definitions */
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enum peripheral_clock_frac_e
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{
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MULTIPLY_BY_ONE = 0, /* Fractional value is zero */
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MULTIPLY_BY_TWO = 1 /* Fractional value is one */
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};
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struct peripheral_clock_config_s
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{
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/* clkname is the name of the peripheral clock. It must be one of the values
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* defined in the chip specific xxxxxx_configname.h header file.
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*/
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enum clock_names_e clkname; /* Peripheral clock name */
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bool clkgate; /* Peripheral clock gate */
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peripheral_clock_source_t clksrc; /* Peripheral clock source */
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enum peripheral_clock_frac_e frac; /* Peripheral clock fractional value */
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uint8_t divider; /* Peripheral clock divider, range 1..8 */
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};
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/* Clock name mappings.
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*
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* Each S32K1xx architecture must provide this array. This is a constant
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* array storing the mappings between clock names and peripheral clock
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* control indexes. If there is no peripheral clock control index for a
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* clock name, then the corresponding value is PCC_INVALID_INDEX.
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*/
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EXTERN const uint16_t g_clkname_mapping[];
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/* Peripheral Features.
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*
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* Each S32K1xx architecture must provide this array. This is an array of
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* bit-encoded peripheral clocking features. See the peripheral instance
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* feature definitions above
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*/
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EXTERN const uint8_t g_periph_features[];
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/************************************************************************************
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* Name: s32k1xx_periphclocks
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*
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* Description:
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* This function configures peripheral clocks in the PCC block.
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*
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* Input Parameters:
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* count - Number of peripheral clocks to be configured
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* pclks - Pointer to an array of peripheral clock configurations
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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void s32k1xx_periphclocks(unsigned int count,
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const struct peripheral_clock_config_s *pclks);
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/****************************************************************************
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* Name: s32k1xx_get_pclkfreq
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*
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* Description:
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* This function returns the clock frequency of the specified peripheral
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* functional clock.
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*
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* Input Parameters:
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* clkname - Identifies the peripheral clock of interest
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* frequency - The location where the peripheral clock frequency will be
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* returned
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned on
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* any failure. -ENODEV is returned if the clock is not enabled or is not
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* being clocked.
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*
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****************************************************************************/
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int s32k1xx_get_pclkfreq(enum clock_names_e clkname, uint32_t *frequency);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_S32K1XX_S32K1XX_PERIPHCLOCKS_H */
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