Gregory Nutt 78adc980e6 SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems		2014-07-12 11:24:14 -06:00
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board_384mhz.h	SAMA5D4: USART peripheral clock appears to be MCK/2	2014-06-20 11:40:36 -06:00
board_396mhz.h	SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.	2014-07-03 12:28:11 -06:00
board_528mhz.h	SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.	2014-07-03 12:28:11 -06:00
board_memorymap.h	Add board support for the SAMA5D4-EK	2014-06-06 12:37:36 -06:00
board_sdram.h	SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.	2014-07-03 12:28:11 -06:00
board.h	SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems	2014-07-12 11:24:14 -06:00
nsh_romfsimg.h	SAMA5D3-EK: Enable the procfs file system in the NSH configuration	2014-07-02 13:08:39 -06:00
rcS.template	SAMA5D3-EK: Enable the procfs file system in the NSH configuration	2014-07-02 13:08:39 -06:00