Petro Karashchenko e545c440f4 arch/arm/samv7/sam_progmem: insert DMB instruction into data write loop ... This change fix the regression that was introduced with https://github.com/apache/incubator-nuttx/pull/4904 In case if D-Cache in configured in Write-Through mode there is Cortex-M7 erata 1313001 that describes a situation when linefill buffer or cache contains stale data. Even if progmem write loop does not fully matches the description there is a possibility to program stale data if there is no DMB instruction after each write operation to progmem latch buffer. Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>		2022-02-05 03:14:07 +08:00
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include	include: fix double include pre-processor guards	2022-01-16 11:11:14 -03:00
src	arch/arm/samv7/sam_progmem: insert DMB instruction into data write loop	2022-02-05 03:14:07 +08:00
Kconfig	arch/arm: select ARM_THUMB by default for Cortex-M	2021-12-27 22:30:53 -06:00