458 lines
12 KiB
C
458 lines
12 KiB
C
/****************************************************************************
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* drivers/motor/foc/drv8301.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/nuttx.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/motor/foc/drv8301.h>
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#include <nuttx/motor/motor_ioctl.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if FOC_BOARDCFG_GAINLIST_LEN < 4
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# error FOC_BOARDCFG_GAINLIST_LEN < 4 not supported
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* DRV8301 device */
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struct drv8301_priv_s
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{
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/* Common FOC power-stage driver - must be first */
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struct focpwr_dev_s dev;
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FAR struct drv8301_ops_s *ops; /* Board ops */
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FAR struct spi_dev_s *spi; /* SPI device reference */
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FAR struct drv8301_cfg_s cfg; /* Configuration */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int drv8301_fault_isr(int irq, void *context, void *arg);
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static int drv8301_gain_set(FAR struct focpwr_dev_s *dev, int gain);
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static int drv8301_gain_get(FAR struct focpwr_dev_s *dev, FAR int *gain);
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static int drv8301_setup(FAR struct focpwr_dev_s *dev);
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static int drv8301_shutdown(FAR struct focpwr_dev_s *dev);
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static int drv8301_calibration(FAR struct focpwr_dev_s *dev, bool state);
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static int drv8301_ioctl(FAR struct focpwr_dev_s *dev, int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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struct focpwr_ops_s g_drv8301_ops =
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{
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.setup = drv8301_setup,
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.shutdown = drv8301_shutdown,
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.calibration = drv8301_calibration,
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.ioctl = drv8301_ioctl,
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: drv8301_lock
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****************************************************************************/
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static void drv8301_lock(FAR struct drv8301_priv_s *priv)
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{
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SPI_LOCK(priv->spi, 1);
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SPI_SETBITS(priv->spi, 16);
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SPI_SETMODE(priv->spi, SPIDEV_MODE1);
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SPI_SETFREQUENCY(priv->spi, priv->cfg.freq);
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}
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/****************************************************************************
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* Name: drv8301_unlock
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****************************************************************************/
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static void drv8301_unlock(FAR struct drv8301_priv_s *priv)
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{
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SPI_LOCK(priv->spi, 0);
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}
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/****************************************************************************
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* Name: drv8301_read
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****************************************************************************/
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static void drv8301_read(FAR struct drv8301_priv_s *priv, uint8_t addr,
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uint16_t *data)
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{
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uint16_t regval = 0;
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drv8301_lock(priv);
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SPI_SELECT(priv->spi, SPIDEV_MOTOR(priv->dev.devno), true);
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/* Read command */
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regval |= (1 << 15);
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regval |= ((addr & 0x0f) << 11);
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/* Send command */
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SPI_SEND(priv->spi, regval);
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/* Toggle CS pin, otherwise read doesn't work */
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SPI_SELECT(priv->spi, SPIDEV_MOTOR(priv->dev.devno), false);
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SPI_SELECT(priv->spi, SPIDEV_MOTOR(priv->dev.devno), true);
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/* Read output */
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regval = 0;
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SPI_RECVBLOCK(priv->spi, ®val, 1);
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/* Retrun data */
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*data = (regval & 0x7ff);
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SPI_SELECT(priv->spi, SPIDEV_MOTOR(priv->dev.devno), false);
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drv8301_unlock(priv);
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}
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/****************************************************************************
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* Name: drv8301_write
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****************************************************************************/
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static void drv8301_write(FAR struct drv8301_priv_s *priv, uint8_t addr,
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uint16_t data)
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{
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uint16_t regval = 0;
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drv8301_lock(priv);
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SPI_SELECT(priv->spi, SPIDEV_MOTOR(priv->dev.devno), true);
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/* Write command */
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regval |= (0 << 15);
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regval |= ((addr & 0x0f) << 11);
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regval |= (0x7ff & data);
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/* Send data */
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SPI_SEND(priv->spi, regval);
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SPI_SELECT(priv->spi, SPIDEV_MOTOR(priv->dev.devno), false);
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drv8301_unlock(priv);
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}
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/****************************************************************************
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* Name: drv8301_fault_isr
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****************************************************************************/
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static int drv8301_fault_isr(int irq, FAR void *context, void *arg)
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{
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FAR struct drv8301_priv_s *priv = NULL;
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priv = (struct drv8301_priv_s *)arg;
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DEBUGASSERT(priv != NULL);
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priv->ops->fault_handle(&priv->dev);
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return OK;
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}
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/****************************************************************************
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* Name: drv8301_setup
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****************************************************************************/
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static int drv8301_setup(FAR struct focpwr_dev_s *dev)
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{
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FAR struct drv8301_priv_s *priv = (FAR struct drv8301_priv_s *)dev;
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uint16_t status1 = 0;
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uint16_t status2 = 0;
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uint16_t ctrl1 = 0;
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uint16_t ctrl2 = 0;
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int ret = OK;
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/* Reset chip */
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priv->ops->gate_enable(dev, true);
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up_udelay(30);
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priv->ops->gate_enable(dev, false);
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up_udelay(30);
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priv->ops->gate_enable(dev, true);
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up_mdelay(10);
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/* Attach fault handler */
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priv->ops->fault_attach(dev, drv8301_fault_isr, priv);
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/* Get status registers */
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drv8301_read(priv, DRV8301_REG_STAT1, &status1);
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drv8301_read(priv, DRV8301_REG_STAT2, &status2);
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/* Configure CTRL1 */
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ctrl1 = DRV8301_CTRL1_GCURR(priv->cfg.gate_curr);
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ctrl1 |= DRV8301_CTRL1_OCADJ(priv->cfg.oc_adj);
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ctrl1 |= (priv->cfg.pwm_mode ? DRV8301_CTRL1_PWMMODE : 0);
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drv8301_write(priv, DRV8301_REG_CTRL1, ctrl1);
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/* Configure CTRL2 */
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ctrl2 = DRV8301_CTRL2_GAIN(priv->cfg.gain);
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drv8301_write(priv, DRV8301_REG_CTRL2, ctrl2);
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return ret;
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}
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/****************************************************************************
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* Name: drv8301_shutdown
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****************************************************************************/
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static int drv8301_shutdown(FAR struct focpwr_dev_s *dev)
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{
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FAR struct drv8301_priv_s *priv = (FAR struct drv8301_priv_s *)dev;
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/* Disable chip */
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priv->ops->gate_enable(dev, false);
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/* Disable nFAULT interrupt */
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priv->ops->fault_attach(dev, NULL, NULL);
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return OK;
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}
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/****************************************************************************
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* Name: drv8301_gain_get
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****************************************************************************/
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static int drv8301_gain_get(FAR struct focpwr_dev_s *dev, FAR int *gain)
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{
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FAR struct drv8301_priv_s *priv = (FAR struct drv8301_priv_s *)dev;
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uint16_t ctrl2 = 0;
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int ret = OK;
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drv8301_read(priv, DRV8301_REG_CTRL2, &ctrl2);
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ctrl2 &= DRV8301_CTRL2_GAIN_MASK;
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if (ctrl2 == DRV8301_CTRL2_GAIN_10)
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{
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*gain = 10;
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}
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else if (ctrl2 == DRV8301_CTRL2_GAIN_20)
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{
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*gain = 20;
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}
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else if (ctrl2 == DRV8301_CTRL2_GAIN_40)
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{
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*gain = 40;
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}
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else if (ctrl2 == DRV8301_CTRL2_GAIN_80)
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{
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*gain = 80;
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}
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else
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{
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ret = -EINVAL;
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}
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return ret;
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}
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/****************************************************************************
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* Name: drv8301_gain_set
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****************************************************************************/
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static int drv8301_gain_set(FAR struct focpwr_dev_s *dev, int gain)
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{
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FAR struct drv8301_priv_s *priv = (FAR struct drv8301_priv_s *)dev;
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uint16_t ctrl2 = 0;
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int ret = OK;
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drv8301_read(priv, DRV8301_REG_CTRL2, &ctrl2);
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ctrl2 &= ~DRV8301_CTRL2_GAIN_MASK;
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if (gain == 10)
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{
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ctrl2 |= DRV8301_CTRL2_GAIN_10;
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}
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else if (gain == 20)
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{
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ctrl2 |= DRV8301_CTRL2_GAIN_20;
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}
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else if (gain == 40)
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{
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ctrl2 |= DRV8301_CTRL2_GAIN_40;
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}
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else if (gain == 80)
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{
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ctrl2 |= DRV8301_CTRL2_GAIN_80;
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}
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else
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{
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ret = -EINVAL;
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goto errout;
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}
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/* Write CTRL2 */
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drv8301_write(priv, DRV8301_REG_CTRL2, ctrl2);
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errout:
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return ret;
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}
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/****************************************************************************
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* Name: drv8301_calibration
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****************************************************************************/
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static int drv8301_calibration(FAR struct focpwr_dev_s *dev, bool state)
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{
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FAR struct drv8301_priv_s *priv = (FAR struct drv8301_priv_s *)dev;
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uint16_t regval = 0;
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drv8301_read(priv, DRV8301_REG_CTRL2, ®val);
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if (state == true)
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{
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regval |= DRV8301_CTRL2_DCCALCH1;
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regval |= DRV8301_CTRL2_DCCALCH2;
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}
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else
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{
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regval &= ~DRV8301_CTRL2_DCCALCH1;
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regval &= ~DRV8301_CTRL2_DCCALCH2;
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}
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drv8301_write(priv, DRV8301_REG_CTRL2, regval);
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return OK;
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}
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/****************************************************************************
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* Name: drv8301_ioctl
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****************************************************************************/
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static int drv8301_ioctl(FAR struct focpwr_dev_s *dev, int cmd,
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unsigned long arg)
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{
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int ret = OK;
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switch (cmd)
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{
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case MTRIOC_SET_BOARDCFG:
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{
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struct foc_set_boardcfg_s *cfg =
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(struct foc_set_boardcfg_s *)arg;
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ret = drv8301_gain_set(dev, cfg->gain);
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break;
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}
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case MTRIOC_GET_BOARDCFG:
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{
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struct foc_get_boardcfg_s *cfg =
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(struct foc_get_boardcfg_s *)arg;
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ret = drv8301_gain_get(dev, &cfg->gain);
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cfg->gain_list[0] = 10;
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cfg->gain_list[1] = 20;
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cfg->gain_list[2] = 40;
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cfg->gain_list[3] = 80;
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break;
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}
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default:
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{
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ret = -ENOTTY;
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break;
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}
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: drv8301_register
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****************************************************************************/
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int drv8301_register(FAR const char *path,
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FAR struct foc_dev_s *dev,
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FAR struct drv8301_board_s *board)
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{
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FAR struct drv8301_priv_s *priv = NULL;
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int ret = OK;
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/* Allocate driver */
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priv = kmm_zalloc(sizeof(struct drv8301_priv_s));
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if (priv == NULL)
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{
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return -ENOMEM;
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}
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/* Register FOC device */
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ret = foc_register(path, dev);
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if (ret < 0)
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{
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return ret;
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}
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/* Store board data */
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priv->ops = board->ops;
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priv->spi = board->spi;
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/* Store configuration */
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memcpy(&priv->cfg, board->cfg, sizeof(struct drv8301_cfg_s));
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/* Initialize FOC power stage */
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return focpwr_initialize(&priv->dev, board->devno, dev, &g_drv8301_ops);
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}
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