216 lines
6.7 KiB
Plaintext
216 lines
6.7 KiB
Plaintext
/****************************************************************************
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* board/arm/src/tlsr82/tlsr8278adk80d/scripts/flash_boot_ble.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* to tell the linker the program begin from __start label in cstartup.s,
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* thus do not treat it as a unused symbol
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*/
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ENTRY(__start)
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SECTIONS
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{
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. = 0x0;
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.vectors :
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{
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*(.vectors)
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/* MUST as follows, when compile with -ffunction-sections
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* -fdata-sections, session name may changed
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*/
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*(.vectors.*)
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}
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.ram_code :
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{
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PROVIDE(_sramcode = ABSOLUTE(.));
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*(.ram_code)
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*(.ram_code.*)
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/* RF and system timer interrupt handler may call the libgcc
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* functions, to make sure the RF and system timer interrupt
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* handler do not execute falsh code, copy all the libgcc code
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* to ram (exclude _divdi3, _udivdi3 and _umoddi3).
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*/
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*libgcc.a:*(EXCLUDE_FILE(_divdi3.o _udivdi3.o _umoddi3.o) .text)
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/* Copy some scheduler related functions and read only data to ram
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* to improve the performance and make sure the RF and system timer
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* interrupt handler do not execute falsh code.
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*/
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*libarch.a:arm_interruptcontext.o(.text .text.*)
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*libarch.a:arm_doirq.o(.text .text.*)
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*libarch.a:arm_unblocktask.o(.text .text.*)
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*libarch.a:arm_blocktask.o(.text .text.*)
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*libsched.a:nx_start.o(.rodata .rodata.g_tasklisttable)
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*libsched.a:sem_post.o(.text .text.*)
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*libsched.a:nxsem_post.o(.text .text.*)
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*libsched.a:sem_wait.o(.text .text.*)
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*libsched.a:nxsem_wait.o(.text .text.*)
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*libsched.a:wd_cancel.o(.text .text.*)
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*libsched.a:sched_removeblocked.o(.text .text.*)
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*libsched.a:sched_addreadytorun.o(.text .text.*)
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*libsched.a:sched_addprioritized.o(.text .text.*)
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*libsched.a:sched_mergepending.o(.text .text.*)
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*libsched.a:sched_lock.o(.text .text.*)
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*libsched.a:sched_unlock.o(.text .text.*)
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*libsched.a:irq_dispatch.o(.text .text.*)
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/* Copy some libs fundamental functions to ram to improve the
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* performance.
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*/
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*libc.a:dq_rem.o(.text .text.*)
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*libc.a:sq_remfirst.o(.text .text.*)
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*libc.a:sq_remafter.o(.text .text.*)
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*libc.a:lib_memcmp.o(.text .text.*)
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*libc.a:lib_memcpy.o(.text .text.*)
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*libc.a:lib_strlen.o(.text .text.*)
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*libc.a:lib_strcmp.o(.text .text.*)
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*libc.a:lib_strncmp.o(.text .text.*)
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/* Copy some zephyr ble functions to ram_code to improve the
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* performance.
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*/
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*libapps.a:*.zblue.o(.text.work_queue_main)
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*libapps.a:*.zblue.o(.text.work_timeout)
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*libapps.a:*.zblue.o(.text.atomic_and)
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*libapps.a:*.zblue.o(.text.atomic_get)
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*libapps.a:*.zblue.o(.text.atomic_or)
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*libapps.a:*.zblue.o(.text.atomic_set)
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*libapps.a:*.zblue.o(.text.atomic_sub)
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*libapps.a:*.zblue.o(.text.arch_irq_lock)
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*libapps.a:*.zblue.o(.text.arch_irq_unlock)
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*libapps.a:*.zblue.o(.text.k_sem_give)
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*libapps.a:*.zblue.o(.text.net_buf_simple_add)
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*libapps.a:*.zblue.o(.text.net_buf_simple_pull)
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/* Copy some tinycrypt functions to ram_code to improve the
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* performance.
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*/
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*libapps.a:*.tinycrypt.o(.text.uECC_vli_add)
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*libapps.a:*.tinycrypt.o(.text.uECC_vli_sub)
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*libapps.a:*.tinycrypt.o(.text.uECC_vli_set)
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PROVIDE(_eramcode = ABSOLUTE(.));
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}
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PROVIDE(_ramcode_size_ = . );
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PROVIDE(_ramcode_size_div_16_ = (. + 15 ) / 16);
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PROVIDE(_ramcode_size_div_256_ = (. + 255) / 256);
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PROVIDE(_ramcode_size_div_16_align_256_ = ( (. + 255) / 256) * 16);
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PROVIDE(_ramcode_size_align_256_ = ( (. + 255) / 256) * 256);
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. = _ramcode_size_align_256_ ; /* >= (_ictag_start_ - 0x840000)*/
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.text :
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{
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PROVIDE(_stext = ABSOLUTE(.));
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*(.text)
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*(.text.*)
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PROVIDE(_etext = ABSOLUTE(.));
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}
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.rodata :
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{
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*(.rodata)
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*(.rodata.*)
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}
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. = ALIGN(4);
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PROVIDE(_rstored_ = . );
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PROVIDE(_code_size_ = .);
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/* __LOAD_FLASH for MCU RUN IN Flash 0x100 aligned, must greater
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* than or equal to : 0x808000 + ram_code_size + irq_vector(0x100) +
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* IC_tag(0x100) + IC_cache(0x800) == 0x808a00 + ram_code_size
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*
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* __LOAD_DUT for MCU RUN IN SRAM, this setting is used for DUT
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* Test and bin size is limited to 8k
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*
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* __LOAD_RAM for MCU RUN IN SRAM
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*/
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. = (0x840000 + ((0x900 + _ramcode_size_align_256_) * __LOAD_FLASH) + (0x400 * __LOAD_DUT) + (_rstored_ * __LOAD_RAM));
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.retention_data : AT ( _rstored_ )
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{
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. = ALIGN(4);
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PROVIDE(_retention_data_start_ = . );
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*(.retention_data)
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*(.retention_data.*)
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. = ALIGN(4);
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PROVIDE(_retention_data_end_ = . );
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}
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PROVIDE(_dstored_ = _rstored_ + _retention_data_end_ - _retention_data_start_);
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.my_code(NOLOAD) :
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{
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*(.spi_slave_buff)
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}
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.data : AT ( _dstored_ )
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{
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. = ALIGN(4);
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PROVIDE(_start_data_ = . );
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*(.data);
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*(.data.*);
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. = ALIGN(4);
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KEEP(*(.info));
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KEEP(*(.info.*));
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. = ALIGN(4);
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PROVIDE(_end_data_ = . );
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}
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.bss :
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{
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. = ALIGN(4);
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PROVIDE(_sbss = .);
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*(.sbss)
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*(.sbss.*)
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*(.bss)
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*(.bss.*)
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}
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/* data in ram but no need to clean in .s*/
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.noinit (NOLOAD) :
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{
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. = ALIGN(4);
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*(.noinit)
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*(.noinit.*)
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}
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. = ALIGN(4);
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PROVIDE(_ebss = .);
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PROVIDE(_bin_size_ = _code_size_ + _end_data_ - _start_data_ + _retention_data_end_ - _retention_data_start_ );
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PROVIDE(_bin_size_div_16 = ( _bin_size_ + 15 ) / 16 );
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PROVIDE(_ictag_start_ = 0x840000 + _ramcode_size_align_256_ );
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PROVIDE(_ictag_end_ = 0x840000 + _ramcode_size_align_256_ + 0x100);
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}
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